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[RFC PATCH, ARM 5/7] Add support for ARMv8-M security extensions instructions

From: "Thomas Preud'homme" <thomas dot preudhomme at foss dot arm dot com>
To: <binutils at sourceware dot org>
Date: Thu, 17 Dec 2015 10:38:19 +0800
Subject: [RFC PATCH, ARM 5/7] Add support for ARMv8-M security extensions instructions
Authentication-results: sourceware.org; auth=none

Hi,

This patch is part of a patch series to add support for ARMv8-M[1] to binutils. This specific patch adds support for ARMv8-M security extensions instructions.

[1] For a quick overview of ARMv8-M please refer to the initial cover letter.

ChangeLog entries are as follow:

*** gas/ChangeLog ***

2015-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

        * config/tc-arm.c (insns): Add ARMv8-M security extensions
        instructions.


*** gas/testsuite/ChangeLog ***

2015-12-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>

        * gas/arm/any-cmse.d: Likewise.
        * gas/arm/archv8m-cmse.s: New file.
        * gas/arm/archv8m-cmse-base.d: Likewise.
        * gas/arm/archv8m-cmse-main.d: Likewise.


*** opcodes/ChangeLog ***

2015-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

        * arm-dis.c (thumb_opcodes): Add entries for narrow ARMv8-M security
        extensions instructions.
        (thumb32_opcodes): Add entries for wide ARMv8-M security extensions
        instructions.


diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 5c739d68f153ad8d72498cd40f13a817410d8ee3..b854b7bbe5ce1e091ffcebd3853a3957aa287648 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -20551,8 +20551,13 @@ static const struct asm_opcode insns[] =
 #define ARM_VARIANT NULL
 #undef  THUMB_VARIANT
 #define THUMB_VARIANT & arm_ext_v8m
+ TUE("sg", 0, e97fe97f, 0, (), 0, noargs),
+ TUE("blxns", 0, 4784, 1, (RRnpc), 0, t_blx),
+ TUE("bxns", 0, 4704, 1, (RRnpc), 0, t_bx),
  TUE("tt", 0, e840f000, 2, (RRnpc, RRnpc), 0, tt),
  TUE("ttt", 0, e840f040, 2, (RRnpc, RRnpc), 0, tt),
+ TUE("tta", 0, e840f080, 2, (RRnpc, RRnpc), 0, tt),
+ TUE("ttat", 0, e840f0c0, 2, (RRnpc, RRnpc), 0, tt),
 };
 #undef ARM_VARIANT
 #undef THUMB_VARIANT
diff --git a/gas/testsuite/gas/arm/any-cmse.d b/gas/testsuite/gas/arm/any-cmse.d
new file mode 100644
index 0000000000000000000000000000000000000000..212c43cc3b1417358f1d5241c87801db924f28fb
--- /dev/null
+++ b/gas/testsuite/gas/arm/any-cmse.d
@@ -0,0 +1,11 @@
+#name: attributes for 'any' CPU with ARMv8-M security extension instructions
+#source: archv8m-cmse.s
+#as:
+#readelf: -A
+# target: *-*-*eabi* *-*-nacl*
+
+Attribute Section: aeabi
+File Attributes
+  Tag_CPU_arch: v8-M.baseline
+  Tag_CPU_arch_profile: Microcontroller
+  Tag_THUMB_ISA_use: Yes
diff --git a/gas/testsuite/gas/arm/archv8m-cmse-base.d b/gas/testsuite/gas/arm/archv8m-cmse-base.d
new file mode 100644
index 0000000000000000000000000000000000000000..30141af12a869992878e8194010c985589e2c25b
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse-base.d
@@ -0,0 +1,17 @@
+#name: ARM V8-M baseline instructions
+#source: archv8m-cmse.s
+#as: -march=armv8-m.base
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+.* <[^>]*> e97f e97f 	sg
+0+.* <[^>]*> 47a4      	blxns	r4
+0+.* <[^>]*> 47cc      	blxns	r9
+0+.* <[^>]*> 4724      	bxns	r4
+0+.* <[^>]*> 474c      	bxns	r9
+0+.* <[^>]*> e841 f080 	tta	r0, r1
+0+.* <[^>]*> e849 f880 	tta	r8, r9
+0+.* <[^>]*> e841 f0c0 	ttat	r0, r1
+0+.* <[^>]*> e849 f8c0 	ttat	r8, r9
diff --git a/gas/testsuite/gas/arm/archv8m-cmse-main.d b/gas/testsuite/gas/arm/archv8m-cmse-main.d
new file mode 100644
index 0000000000000000000000000000000000000000..cd6e6a2714d799ddab98eab54fb9b7b61a3bb1b9
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse-main.d
@@ -0,0 +1,17 @@
+#name: ARM V8-M mainline instructions
+#source: archv8m-cmse.s
+#as: -march=armv8-m.main
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+.* <[^>]*> e97f e97f 	sg
+0+.* <[^>]*> 47a4      	blxns	r4
+0+.* <[^>]*> 47cc      	blxns	r9
+0+.* <[^>]*> 4724      	bxns	r4
+0+.* <[^>]*> 474c      	bxns	r9
+0+.* <[^>]*> e841 f080 	tta	r0, r1
+0+.* <[^>]*> e849 f880 	tta	r8, r9
+0+.* <[^>]*> e841 f0c0 	ttat	r0, r1
+0+.* <[^>]*> e849 f8c0 	ttat	r8, r9
diff --git a/gas/testsuite/gas/arm/archv8m-cmse.s b/gas/testsuite/gas/arm/archv8m-cmse.s
new file mode 100644
index 0000000000000000000000000000000000000000..520550c8709d9cc8b73756fabc6147cb3009505e
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse.s
@@ -0,0 +1,12 @@
+.thumb
+.syntax unified
+
+sg
+blxns r4
+blxns r9
+bxns  r4
+bxns  r9
+tta   r0, r1
+tta   r8, r9
+ttat  r0, r1
+ttat  r8, r9
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 9df70c506184673fdc50868d61ddfee796e85464..9664a7238513b15426176c3e0560241945a14bad 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2321,6 +2321,10 @@ static const struct opcode16 thumb_opcodes[] =
 {
   /* Thumb instructions.  */
 
+  /* ARM V8-M instructions.  */
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4784, 0xff87, "blxns\t%3-6r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff07, "bxns\t%3-6r"},
+
   /* ARM V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xbf50, 0xffff, "sevl%c"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xba80, 0xffc0, "hlt\t%0-5x"},
@@ -2527,10 +2531,15 @@ static const struct opcode16 thumb_opcodes[] =
 static const struct opcode32 thumb32_opcodes[] =
 {
   /* V8-M instructions.  */
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0xe97fe97f, 0xffffffff, "sg"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
     0xe840f000, 0xfff0f0ff, "tt\t%8-11r, %16-19r"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
     0xe840f040, 0xfff0f0ff, "ttt\t%8-11r, %16-19r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
+    0xe840f080, 0xfff0f0ff, "tta\t%8-11r, %16-19r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
+    0xe840f0c0, 0xfff0f0ff, "ttat\t%8-11r, %16-19r"},
 
   /* V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),


Tests done:

* No regression under binutils testsuite
* Toolchain was built successfully with and without the ARMv8-M support patches[2] with the following multilib list: armv6-m,armv7-m,armv7e-m,cortex-m7,armv8-m.base,armv8-m.main. The code generation for crtbegin.o, crtend.o, crti.o, crtn.o, libgcc.a, libgcov.a, libc.a, libg.a, libgloss-linux.a, libm.a, libnosys.a, librdimon.a, librdpmon.a, libstdc++.a and libsupc++.a is unchanged for all targets supported before the patches.
* Thumb-1 (default arch and --with-mode=thumb) and Thumb-2 (--with-arch=armv7-a --with-mode=thumb) GCC bootstrap using binutils with this patch
* No GCC testsuite regression on fast model compared to ARMv6s-M (Baseline) or ARMv7-M (Mainline)

[2] including this one, the ld one and the GCC one


As the title implies, we are not proposing this patch for inclusion yet. However, we welcome any comments you might have on the patch right now.

Best regards,

Thomas

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