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Re: [Aarch64] Support ARMv8.2 AT instructions

On 14/12/15 16:19, Marcus Shawcroft wrote:
On 11 December 2015 at 12:58, Matthew Wahab <> wrote:

[Re-inserted the context]
I made a mistake with rebasing the ARMv8.2 AT instruction patch which
left this part

+  /* AT S1E1RP, AT S1E1WP.  Values are from aarch64_sys_regs_at.  */
+  if ((reg->value == CPENS (0, C7, C9, 0)
+       || reg->value == CPENS (0, C7, C9, 1))
+      && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+    return FALSE;

in aarch64_pstatefield_supported_p rather than in
aarch64_sys_ins_reg_supported_p, where it was supposed to be.

The patch adding support for id_aa64mmfr2_el1
(, also had
the effect of removing a conditional branch in aarch64_sys_reg_supported_p.

The effect of both of these is to suppress an error if some ARMv8.2
system registers are used with the wrong -march settings.

This patch fixes these mistakes.

Tested for aarch64-none-linux-gnu with cross-compiled check-binutils and

2015-12-11  Matthew Wahab  <>

         * aarch64-opc.c (aarch64_sys_reg_supported_p): Add mistakenly
         removed statement.
         (aarch64_pstatefield_supported_p): Move feature checks for AT
         registers ..
         (aarch64_sys_ins_reg_supported_p): .. to here.

OK /Marcus

Tristan, is this OK for the 2.26 branch?

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