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Re: [PATCH] opcodes/ppc-opc.c: Add dscr and ctrl SPR mnemonics
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: Anton Blanchard <anton at samba dot org>
- Cc: binutils at sourceware dot org
- Date: Wed, 09 Sep 2015 15:01:20 -0500
- Subject: Re: [PATCH] opcodes/ppc-opc.c: Add dscr and ctrl SPR mnemonics
- Authentication-results: sourceware.org; auth=none
- References: <20150909164444 dot 57063a26 at kryten>
On Wed, 2015-09-09 at 16:44 +1000, Anton Blanchard wrote:
> {"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, PPCNONE, {RT}},
> +{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, PPCNONE, {RT}},
Please move this above the mftid pattern above it. We like to have it
ordered with newer instructions listed first, so if you use -many in
your assembler options, we'll use mfdscr instead of mftid.
> {"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, PPCNONE, {RS}},
> +{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, PPCNONE, {RS}},
Same here.
> +{"mfctrl", XSPR(31,339,136), XSPR_MASK, POWER4, PPCNONE, {RT}},
[snip]
> +{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, PPCNONE, {RS}},
Is there a typo in the ISA documentation with the associated SPR numbers?
All other m[tf]spr instructions use the same SPR number for both the mtspr
and mfspr instructions, except this one.
If the m[tf]crtl instructions really do have different SPR numbers,
then the patch is ok with the reordering of the m[ft]dscr lines I
mentioned above.
Peter