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[AArch64][5/6] GAS support TLSLD load/store relocation types


All these relocation types are for LDST instructions, they share the
same gas internal logic, so put them together.

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (ldst_lo12_determine_real_reloc_type): Support new LDST reloc types.
  (parse_operands): Likewise.
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel-lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.s: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel-lo12-ldst8-nc.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst16-nc.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst32-nc.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64-nc.d: Likewise.

commit 6a632ba8459c2a8cf179591070fb90a423240566
Author: Jiong Wang <jiong.wang@arm.com>
Date:   Wed Aug 19 11:22:22 2015 +0100

    5

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 7a5ff76..6ba3641 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5815,6 +5815,34 @@ instruction.  */
 /* GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.  */
   BFD_RELOC_AARCH64_TLSLD_ADR_PREL21,
 
+/* bit[11:1] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+
+/* bit[11:2] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+
+/* bit[11:3] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+
+/* bit[11:0] of byte offset to module TLS base address, encoded in ldst
+instructions.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+
 /* bit[15:0] of byte offset to module TLS base address.  */
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
 
@@ -5929,6 +5957,14 @@ assembler and not (currently) written to any object files.  */
 address.  Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.  */
   BFD_RELOC_AARCH64_LDST_LO12,
 
+/* AArch64 pseudo relocation code for TLS local dynamic mode.  It's to be
+used internally by the AArch64 assembler and not (currently) written to
+any object files.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12,
+
+/* Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.  */
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC,
+
 /* AArch64 pseudo relocation code to be used internally by the AArch64
 assembler and not (currently) written to any object files.  */
   BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index eb79922..083bb0f 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1139,6 +1139,126 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1fffff,		/* dst_mask */
 	 TRUE),			/* pcrel_offset */
 
+  /* LD/ST16: bit[11:1] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC),	/* type */
+	 1,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 11,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x1ffc00,		/* src_mask */
+	 0x1ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST32: bit[11:2] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC),	/* type */
+	 2,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 10,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffc00,		/* src_mask */
+	 0xffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST64: bit[11:3] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC),	/* type */
+	 3,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 9,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x7fc00,		/* src_mask */
+	 0x7fc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* LD/ST8: bit[11:0] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.  */
+  HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 10,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0x3ffc00,		/* src_mask */
+	 0x3ffc00,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   /* MOVZ: bit[15:0] of byte offset to module TLS base address.  */
   HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0),	/* type */
 	 0,			/* rightshift */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 5b3359c..fc70e29 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2765,6 +2765,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
+  "BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC",
+  "BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC",
   "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1",
@@ -2801,6 +2809,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_RELOC_END",
   "BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP",
   "BFD_RELOC_AARCH64_LDST_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12",
+  "BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_LD_GOT_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 90ddfb5..3d329a5 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6871,6 +6871,42 @@ ENUM
 ENUMDOC
   GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
+ENUMDOC
+  bit[11:1] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
+ENUMDOC
+  bit[11:2] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
+ENUMDOC
+  bit[11:3] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
+ENUMDOC
+  bit[11:0] of byte offset to module TLS base address, encoded in ldst
+  instructions.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
+ENUM
   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
 ENUMDOC
   bit[15:0] of byte offset to module TLS base address.
@@ -7021,6 +7057,16 @@ ENUMDOC
   AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
   address.  Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+ENUMDOC
+  AArch64 pseudo relocation code for TLS local dynamic mode.  It's to be
+  used internally by the AArch64 assembler and not (currently) written to
+  any object files.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
+ENUMDOC
+  Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
+ENUM
   BFD_RELOC_AARCH64_LD_GOT_LO12_NC
 ENUMDOC
   AArch64 pseudo relocation code to be used internally by the AArch64
@@ -7035,7 +7081,6 @@ ENUM
 ENUMDOC
   AArch64 pseudo relocation code to be used internally by the AArch64
   assembler and not (currently) written to any object files.
-
 ENUM
   BFD_RELOC_TILEPRO_COPY
 ENUMX
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d373c70..b97a090 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2528,7 +2528,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
-   0,
+   BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12,
    0},
 
   /* Same as dtprel_lo12, no overflow check.  */
@@ -2537,7 +2537,7 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0,
    BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC,
-   0,
+   BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC,
    0},
 
   /* bits[23:12] of offset to the module TLS base address.  */
@@ -4739,17 +4739,38 @@ get_logsz (unsigned int size)
 static inline bfd_reloc_code_real_type
 ldst_lo12_determine_real_reloc_type (void)
 {
-  int logsz;
+  unsigned logsz;
   enum aarch64_opnd_qualifier opd0_qlf = inst.base.operands[0].qualifier;
   enum aarch64_opnd_qualifier opd1_qlf = inst.base.operands[1].qualifier;
 
-  const bfd_reloc_code_real_type reloc_ldst_lo12[5] = {
-      BFD_RELOC_AARCH64_LDST8_LO12, BFD_RELOC_AARCH64_LDST16_LO12,
-      BFD_RELOC_AARCH64_LDST32_LO12, BFD_RELOC_AARCH64_LDST64_LO12,
+  const bfd_reloc_code_real_type reloc_ldst_lo12[3][5] = {
+    {
+      BFD_RELOC_AARCH64_LDST8_LO12,
+      BFD_RELOC_AARCH64_LDST16_LO12,
+      BFD_RELOC_AARCH64_LDST32_LO12,
+      BFD_RELOC_AARCH64_LDST64_LO12,
       BFD_RELOC_AARCH64_LDST128_LO12
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
+      BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
+      BFD_RELOC_AARCH64_NONE
+    },
+    {
+      BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+      BFD_RELOC_AARCH64_NONE
+    }
   };
 
-  gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12);
+  gas_assert (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
+	      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+	      || (inst.reloc.type
+		  == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC));
   gas_assert (inst.base.opcode->operands[1] == AARCH64_OPND_ADDR_UIMM12);
 
   if (opd1_qlf == AARCH64_OPND_QLF_NIL)
@@ -4759,9 +4780,16 @@ ldst_lo12_determine_real_reloc_type (void)
   gas_assert (opd1_qlf != AARCH64_OPND_QLF_NIL);
 
   logsz = get_logsz (aarch64_get_qualifier_esize (opd1_qlf));
-  gas_assert (logsz >= 0 && logsz <= 4);
+  if (inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
+      || inst.reloc.type == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC)
+    gas_assert (logsz <= 3);
+  else
+    gas_assert (logsz <= 4);
 
-  return reloc_ldst_lo12[logsz];
+  /* In reloc.c, these pseudo relocation types should be defined in similar
+     order as above reloc_ldst_lo12 array. Because the array index calcuation
+     below relies on this.  */
+  return reloc_ldst_lo12[inst.reloc.type - BFD_RELOC_AARCH64_LDST_LO12][logsz];
 }
 
 /* Check whether a register list REGINFO is valid.  The registers must be
@@ -5397,7 +5425,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	    }
 	  if (inst.reloc.type == BFD_RELOC_UNUSED)
 	    aarch64_set_gas_internal_fixup (&inst.reloc, info, 1);
-	  else if (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12)
+	  else if (inst.reloc.type == BFD_RELOC_AARCH64_LDST_LO12
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12)
+		   || (inst.reloc.type
+		       == BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC))
 	    inst.reloc.type = ldst_lo12_determine_real_reloc_type ();
 	  /* Leave qualifier to be determined by libopcodes.  */
 	  break;
@@ -6870,6 +6902,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
@@ -7090,6 +7130,14 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
new file mode 100644
index 0000000..fec41b2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7980009b 	ldrsh	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST16_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s
new file mode 100644
index 0000000..a9ac0c5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
+	ldrsh  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
new file mode 100644
index 0000000..74f122c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b980009b 	ldrsw	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST32_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s
new file mode 100644
index 0000000..18ad0f0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
+	ldrsw  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
new file mode 100644
index 0000000..c8858f8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST64_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s
new file mode 100644
index 0000000..7a017f6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
+	ldr  x27, [x4, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
new file mode 100644
index 0000000..3b6560e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	39800115 	ldrsb	x21, \[x8\]
+			0: R_AARCH64_TLSLD_LDST8_DTPREL_LO12	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s
new file mode 100644
index 0000000..7391376
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12 for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
+	ldrsb  x21, [x8, #:dtprel_lo12:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
new file mode 100644
index 0000000..1b24e1c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	7940009b 	ldrh	w27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s
new file mode 100644
index 0000000..3262a8f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST16
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
+	ldrh  w27, [x4, #:dtprel_lo12_nc:sym]
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
new file mode 100644
index 0000000..883e427
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	b98000f4 	ldrsw	x20, \[x7\]
+			0: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s
new file mode 100644
index 0000000..60f1c70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
+	ldrsw  x20, [x7, #:dtprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
new file mode 100644
index 0000000..fd9e1cb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f940009b 	ldr	x27, \[x4\]
+			0: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s
new file mode 100644
index 0000000..d5da5cb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST64
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
+	ldr  x27, [x4, #:dtprel_lo12_nc:sym]
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
new file mode 100644
index 0000000..76adce0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
@@ -0,0 +1,10 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	3940005d 	ldrb	w29, \[x2\]
+			0: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC	sym
+
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s
new file mode 100644
index 0000000..80648e0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.s
@@ -0,0 +1,6 @@
+// Test file for AArch64 GAS -- dtprel_lo12_nc for LDST8
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
+	ldrb  w29, [x2, #:dtprel_lo12_nc:sym]
+

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