This is the mail archive of the mailing list for the binutils project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches

>>> On 12.05.15 at 14:37, <> wrote:
> On Tue, May 12, 2015 at 5:20 AM, Jan Beulich <> wrote:
>>>>> On 12.05.15 at 13:54, <> wrote:
>>> On Tue, May 12, 2015 at 3:41 AM, Jan Beulich <> wrote:
>>>>>>> On 11.05.15 at 23:23, <> wrote:
>>>>> Disp16 and Disp32 aren't supported by direct branches in 64-bit mode.
>>>>> This patch removes them from 64-bit direct branches.
>>>> See the recent discussion regarding callw - these can certainly have
>>>> 16-bit displacements on AMD CPUs. And while disassembly may just
>>>> get "disturbed" by getting this wrong, assembly will produce bad
>>>> code if you don't account for both cases (or refuse to assemble
>>>> such mnemonics if they would require size overrides to be added).
>>>> Apart from that I wonder why you do this for CALL and JMP, but not
>>>> for Jcc, JCXZ, JRCXZ, LOOP, and LOOPcc.
>>>> But first of all - please don't bias x86 binutils towards only supporting
>>>> Intel hardware.
>>> Can you generate call/jmp with 16-bit displacement in 64-bit mode?
>> Didn't check whether there is a mechanism currently; of course I
>> would expect "data16 jmp <label>" to do precisely that.
> Does my change generate different binary now?

I suppose so (but I don't have the time to check right now). What
I did check is that what I suggested above indeed works with 2.25,
including the creation of 16-bit PC-relative relocations.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]