This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jan Beulich <JBeulich at suse dot com>
- Cc: Binutils <binutils at sourceware dot org>
- Date: Tue, 12 May 2015 04:54:55 -0700
- Subject: Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Authentication-results: sourceware.org; auth=none
- References: <20150511212331 dot GA1838 at intel dot com> <5551F4E70200007800079575 at mail dot emea dot novell dot com>
On Tue, May 12, 2015 at 3:41 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 11.05.15 at 23:23, <hongjiu.lu@intel.com> wrote:
>> Disp16 and Disp32 aren't supported by direct branches in 64-bit mode.
>> This patch removes them from 64-bit direct branches.
>
> See the recent discussion regarding callw - these can certainly have
> 16-bit displacements on AMD CPUs. And while disassembly may just
> get "disturbed" by getting this wrong, assembly will produce bad
> code if you don't account for both cases (or refuse to assemble
> such mnemonics if they would require size overrides to be added).
>
> Apart from that I wonder why you do this for CALL and JMP, but not
> for Jcc, JCXZ, JRCXZ, LOOP, and LOOPcc.
>
> But first of all - please don't bias x86 binutils towards only supporting
> Intel hardware.
Can you generate call/jmp with 16-bit displacement in 64-bit mode?
--
H.J.