This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order


>>> On 23.04.15 at 14:39, <hjl.tools@gmail.com> wrote:
> On Thu, Apr 16, 2015 at 7:18 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> As pointed out before, the documentation mandates the rounding mode to
>> follow the GPR, so disassembler should produce output accordingly.
>>
>> gas/testsuite/
>> 2015-04-16  Jan Beulich  <jbeulich@suse.com>
>>
>>         * gas/i386/avx512f.s: Adjust operand order for Intel syntax
>>         vcvt{,u}si2ss.
>>         * gas/i386/x86-64-avx512f.s: Adjust operand order for Intel
>>         syntax vcvt{,u}si2s{d,s}.
>>
>> opcodes/
>> 2015-04-16  Jan Beulich  <jbeulich@suse.com>
>>
>>         * i386-dis.c (print_insn): Swap rounding mode specifier and
>>         general purpose register in Intel mode.
> 
> I checked with our people.   Intel Software Developer Manual only governs
> the output side of the binary form of instruction byte stream matches what
> HW expect. Each assembly tool product has its own implementation of
> transforming the input language/dialect into the output stream.  In case of
> GNU assembler, operand order for AT&T and Intel syntax for AVX512 is
> the one used in AVX512 testcases.
> 
> It is not OK.

Same here then as for the previous patch.

Jan


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]