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Re: [PATCH] A few ppc assembler fixes
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: Alan Modra <amodra at gmail dot com>
- Cc: Binutils <binutils at sourceware dot org>, Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>, Hal Finkel <hfinkel at anl dot gov>
- Date: Wed, 22 Apr 2015 22:52:06 -0500
- Subject: Re: [PATCH] A few ppc assembler fixes
- Authentication-results: sourceware.org; auth=none
- References: <1429746727 dot 21947 dot 60 dot camel at otta> <20150423031444 dot GM12627 at bubble dot grove dot modra dot org>
On Thu, 2015-04-23 at 12:44 +0930, Alan Modra wrote:
> If I'm not mistaken the dcbt/dcbtst change will affect the following
> -m options.
> -m601 +server
> -mppc +server
> -mppc32 +server
> -m603 +server
> -m604 +server
Yes, although these old cpus only ever used the two operand
> -m403 +server
> -m405 +server
My bad, I thought these were caught with the BOOKE usage.
I'll have to move these back to the embedded side.
> -m7400 +server
> -m7410 +server
> -m7450 +server
> -m7455 +server
These only use the two operand version of the instruction, so are
probably a don't care. However, I should probably move these
back to the embedded side too.
> -m750cl +server
This also only uses the two operand version of the instruction,
but since this is an IBM part, it's probably safest to use the
> -mppc64 +server
> -m620 +server
> -mppc64bridge +server
Yes, I think we want server ordering here too.
> -me300 +server
Another case I thought BOOKE would catch, but didn't. I'll change it.
> -me5500 -server
> -me6500 -server
These are embedded processors, and they use the three operand
version of the instruction and expect the embedded ordering,
so yes, these are correct.
> -mspe +server
This is more an instruction category rather than a cpu, isn't it?
That said, it's probably safest to lump this in with the embedded
cpus, since that's where it seems to be used. Do you agree?