This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Re: [Patch, MIPS] Add Octeon3 support
- From: Andrew Pinski <andrew dot pinski at caviumnetworks dot com>
- To: "Hurugalawadi, Naveen" <Naveen dot Hurugalawadi at caviumnetworks dot com>, "Matthew dot Fortune at imgtec dot com" <Matthew dot Fortune at imgtec dot com>, "binutils at sourceware dot org" <binutils at sourceware dot org>, "Pinski, Andrew" <Andrew dot Pinski at caviumnetworks dot com>, Richard Sandiford <rdsandiford at googlemail dot com>
- Date: Fri, 31 Oct 2014 13:50:23 -0700
- Subject: Re: [Patch, MIPS] Add Octeon3 support
- Authentication-results: sourceware.org; auth=none
- References: <1412588878522 dot 14605 at caviumnetworks dot com> <1412653796915 dot 75675 at caviumnetworks dot com> <1412751341088 dot 89588 at caviumnetworks dot com> <87d29l2l2e dot fsf at googlemail dot com> <878uk92kw1 dot fsf at googlemail dot com> <1414651702974 dot 41256 at caviumnetworks dot com> <87oastkxaf dot fsf at googlemail dot com>
On Thu, Oct 30, 2014 at 3:28 PM, Richard Sandiford
<rdsandiford@googlemail.com> wrote:
> "Hurugalawadi, Naveen" <Naveen.Hurugalawadi@caviumnetworks.com> writes:
>> 2014-10-30 Andrew Pinski <apinski@cavium.com>
>
> If you helped to write the updates from the first patch, please add
> yourself as coauthor.
>
>> bfd/ChangeLog
>> * archures.c: Add octeon3 for mips target.
>> * bfd-in2.h: Regenerate.
>> * bfd/cpu-mips.c: Define I_mipsocteon3.
>> (arch_info_struct): Add octeon3 support.
>> * bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
>> octeon3.
>> (mips_set_isa_flags): Add support for octeon3.
>> (bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
>> (mips_mach_extensions): Make bfd_mach_mips_octeon3 an
>> extension of bfd_mach_mips_octeon2.
>> (print_mips_isa_ext): Print the value of Octeon3.
>>
>> binutils/ChangeLog
>> * readelf.c (print_mips_isa_ext): Print the value of Octeon3.
>>
>> gas/ChangeLog
>> * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
>> (mips_cpu_info_table): Octeon3 enables virt ase.
>> * doc/c-mips.texi: Document octeon3 as an acceptable value for
>> -march=.
>>
>> gas/testsuite/ChangeLog
>> * gas/mips/mips.exp: Add support for Octeon3 architecture.
>> Also add in support for running Octeon3 tests.
>> * gas/mips/octeon3.d: New test.
>> * gas/mips/octeon3.s: New test source.
>>
>> include/ChangeLog
>> * elf/mips.h (AFL_EXT_OCTEON3): Define.
>> INSN_OCTEON3, CPU_OCTEON3): Define.
>>
>> opcodes/ChangeLog
>> * mips-dis.c (mips_arch_choices): Add octeon3.
>> * mips-opc.c (IOCT): Include INSN_OCTEON3.
>> (IOCT2): Likewise.
>> (IOCT3): New define.
>> (IVIRT): New define.
>> (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
>> tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
>> IVIRT instructions.
>> Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
>> operand for IOCT3.
>>
>
> OK, thanks.
I committed this for Naveen since he does not have binutils write access.
With the following changeLog and made sure Naveen was recorded as the author:
MIPS: Add Octeon 3 support
binutils:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* readelf.c (print_mips_isa_ext): Print the value of Octeon3.
gas:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
(mips_cpu_info_table): Octeon3 enables virt ase.
* doc/c-mips.texi: Document octeon3 as an acceptable value for
-march=.
gas/testsuite:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gas/mips/mips.exp: Add support for Octeon3 architecture.
Also add in support for running Octeon3 tests.
* gas/mips/octeon3.d: New test.
* gas/mips/octeon3.s: New test source.
opcodes:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add octeon3.
* mips-opc.c (IOCT): Include INSN_OCTEON3.
(IOCT2): Likewise.
(IOCT3): New define.
(IVIRT): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
IVIRT instructions.
Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
operand for IOCT3.
bfd:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* archures.c: Add octeon3 for mips target.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c: Define I_mipsocteon3.
nfo_struct): Add octeon3 support.
* bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
octeon3.
(mips_set_isa_flags): Add support for octeon3.
(bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
(mips_mach_extensions): Make bfd_mach_mips_octeon3 an
extension of bfd_mach_mips_octeon2.
(print_mips_isa_ext): Print the value of Octeon3.
Thanks,
Andrew
>
> Richard