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RE: [PATCH] Add support for MIPS64r6
- From: Andrew Bennett <Andrew dot Bennett at imgtec dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>, Rich Fuhler <Rich dot Fuhler at imgtec dot com>, Matthew Fortune <Matthew dot Fortune at imgtec dot com>, "Saeed Ghazanfar" <Saeed dot Ghazanfar at imgtec dot com>
- Date: Sun, 14 Sep 2014 20:31:23 +0000
- Subject: RE: [PATCH] Add support for MIPS64r6
- Authentication-results: sourceware.org; auth=none
- References: <0DA23CC379F5F945ACB41CF394B98277575FCF at LEMAIL01 dot le dot imgtec dot org> <871tw55vds dot fsf at talisman dot default> <0DA23CC379F5F945ACB41CF394B9827757AE7E at LEMAIL01 dot le dot imgtec dot org> <87zjikb01y dot fsf at talisman dot default> <0DA23CC379F5F945ACB41CF394B9827720E3F99A at LEMAIL01 dot le dot imgtec dot org> <87a9956tu6 dot fsf at talisman dot default> <0DA23CC379F5F945ACB41CF394B9827720EDF70D at LEMAIL01 dot le dot imgtec dot org> <87y4tnx62p dot fsf at googlemail dot com>
> From: Richard Sandiford [mailto:rdsandiford@googlemail.com]
> Sent: 13 September 2014 09:45
> To: Andrew Bennett
> Cc: binutils@sourceware.org; Rich Fuhler; Matthew Fortune; Saeed Ghazanfar
> Subject: Re: [PATCH] Add support for MIPS64r6
>
> Andrew Bennett <Andrew.Bennett@imgtec.com> writes:
> > +/* OP_NON_ZERO_REG matcher. */
> > +
> > +static bfd_boolean
> > +match_non_zero_reg_operand (struct mips_arg_info *arg, const struct
> mips_operand *operand)
>
> Long line.
>
> > @@ -11044,8 +11294,11 @@ macro (struct mips_cl_insn *ip, char *str)
> > goto ld_st;
> > case M_LWC2_AB:
> > s = "lwc2";
> > - fmt = COP12_FMT;
> > - offbits = (mips_opts.micromips ? 12 : 16);
> > + fmt = (ISA_IS_R6 (mips_opts.isa) ? "E,+:(d)"
> > + : COP12_FMT);
>
> You do this for all uses of COP12_FMT, so please do it in COP12_FMT itself.
>
> > @@ -11103,13 +11359,19 @@ macro (struct mips_cl_insn *ip, char *str)
> > goto ld_st;
> > case M_LL_AB:
> > s = "ll";
> > - fmt = MEM12_FMT;
> > - offbits = (mips_opts.micromips ? 12 : 16);
> > + fmt = (ISA_IS_R6 (mips_opts.isa) ? "t,+j(b)"
> > + : MEM12_FMT);
> > + offbits = (mips_opts.micromips ? 12
> > + : ISA_IS_R6 (mips_opts.isa) ? 9
> > + : 16);
>
> And here I think we want to put the fmt ?: in a new LL_SC_FMT macro,
> for all LL and SC variants.
>
> > @@ -16018,10 +16366,16 @@ s_nan (int ignore ATTRIBUTE_UNUSED)
> >
> > if (i == sizeof (str_2008) - 1
> > && memcmp (input_line_pointer, str_2008, i) == 0)
> > - mips_flag_nan2008 = TRUE;
> > + mips_nan2008 = 1;
> > else if (i == sizeof (str_legacy) - 1
> > && memcmp (input_line_pointer, str_legacy, i) == 0)
> > - mips_flag_nan2008 = FALSE;
> > + {
> > + if (ISA_HAS_LEGACY_NAN (file_mips_opts.isa))
> > + mips_nan2008 = 0;
> > + else
> > + as_fatal (_("`%s' does not support legacy NaN"),
> > + mips_cpu_info_from_isa (file_mips_opts.isa)->name);
>
> This should be as_bad rather than as_fatal. Fatal errors are good for
> bogus command lines, but for directives we should try to continue.
>
> OK with those changes, thanks.
I have now made these changes, and are ready to commit the patch, but I
forgot to mention that this patch relies on the soft float/single float
patch that Matthew submitted to have clean testsuite results. Are you
happy for me to still commit the patch, or shall I wait until Matthew
has committed his work first?
Many thanks,
Andrew