>From ed725709cc573b56a0daf83390a5c9ee89539b21 Mon Sep 17 00:00:00 2001 From: Ilya Tocar Date: Thu, 17 Jul 2014 13:59:32 +0400 Subject: [PATCH] Correctly handle evex-only registers in .set derective. gas/ * config/tc-i386.c (parse_register): Set need_vrex. gas/testsuite/ * gas/i386/equ_evex.d: New. * gas/i386/equ_evex.s: New. * gas/i386/i386.exp: Run new test. --- gas/ChangeLog | 4 ++++ gas/config/tc-i386.c | 5 +++++ gas/testsuite/ChangeLog | 6 ++++++ gas/testsuite/gas/i386/equ_evex.d | 11 +++++++++++ gas/testsuite/gas/i386/equ_evex.s | 12 ++++++++++++ gas/testsuite/gas/i386/i386.exp | 1 + 6 files changed, 39 insertions(+) create mode 100644 gas/testsuite/gas/i386/equ_evex.d create mode 100644 gas/testsuite/gas/i386/equ_evex.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 512bd03..9180b52 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2014-07-17 Ilya Tocar + + * config/tc-i386.c (parse_register): Set need_vrex. + 2014-07-15 Jiong Wang * config/tc-arm.c (add_to_lit_pool): Use "inst.operands[1].imm" for diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index d0d4d6c..0a3b18e 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -9433,6 +9433,11 @@ parse_register (char *reg_string, char **end_op) *input_line_pointer = c; input_line_pointer = save; } + + /* Upper 16 vector register is only available with VREX. */ + if (r && (r->reg_flags & RegVRex)) + i.need_vrex = 1; + return r; } diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 4e91b37..70f3aa0 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2014-07-17 Ilya Tocar + + * gas/i386/equ_evex.d: New. + * gas/i386/equ_evex.s: New. + * gas/i386/i386.exp: Run new test. + 2014-07-12 David Majnemer * gas/pe/set.s, * gas/pe/set.d: New test. diff --git a/gas/testsuite/gas/i386/equ_evex.d b/gas/testsuite/gas/i386/equ_evex.d new file mode 100644 index 0000000..3ecb0bb --- /dev/null +++ b/gas/testsuite/gas/i386/equ_evex.d @@ -0,0 +1,11 @@ +#objdump: -drw +#name: evex equates + +.*: +file format .* + +Disassembly of section .text: + +0+000 <_start>: +[ ]*[a-f0-9]+: 62 e1 76 08 58 c8 vaddss %xmm0,%xmm1,%xmm17 +[ ]*[a-f0-9]+: 62 b1 76 08 58 c1 vaddss %xmm17,%xmm1,%xmm0 +#pass diff --git a/gas/testsuite/gas/i386/equ_evex.s b/gas/testsuite/gas/i386/equ_evex.s new file mode 100644 index 0000000..87e5d62 --- /dev/null +++ b/gas/testsuite/gas/i386/equ_evex.s @@ -0,0 +1,12 @@ + .text +_start: + + .set ACC, %xmm17 + + vaddss %xmm0,%xmm1,ACC + + .intel_syntax noprefix + + .set ACC, xmm17 + + vaddss xmm0,xmm1,ACC diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 6389a07..7f386f0 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -453,6 +453,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-disp-intel" run_dump_test "x86-64-disp32" run_dump_test "rexw" + run_dump_test "equ_evex" run_list_test "x86-64-specific-reg" run_list_test "x86-64-suffix-bad" run_dump_test "x86-64-fxsave" -- 1.8.3.1