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Re: 32-bit PowerPC sdata linker problem

On 2014-06-06 14:15, Alan Modra wrote:
On Fri, Jun 06, 2014 at 01:31:48PM +0200, Sebastian Huber wrote:
>On 2014-06-06 13:23, Sebastian Huber wrote:
> >Ok, so this "cmplwi cr0, rX, ppc_exc_lock_std@sdarel" is illegal, since
> >ppc_exc_lock_std@sdarel is signed and the immediate is unsigned 16-bit?  The
> >assembler doesn't issue a warning about this.
> >
> >Exists there a way to rescue this cmplwi hack without relaxing the overflow
> >checks?
>Hm, sorry, it was surprisingly simple.  This works:
>"cmplwi cr0, rX, ppc_exc_lock_std@sdarel@l"
>I was not aware that you can add several @ in a row.
That is the wrong thing to use here.  sdarel@l translates to a VLE
reloc which applies to a split 16-bit field in VLE insns.

Oh, yes.  This is not what I want.

You want
  cmpwi cr0, rX, ppc_exc_lock_std@sdarel
to properly compare a 16-bit signed number from sym@sdarel.

Note that the assembler does error if you write something like
  cmplwi 3,-30000
  cmpwi 3,40000
so what the linker is now doing is extending this behaviour to link

I actually need only the lower 16-bit of sym@sdarel here. The code reads an opcode on a certain address and tests if the opcode is equal to "stw r1, ppc_exc_lock_std@sdarel(r13)".

 * USES:    REG, cr0
 * ON EXIT: REG available (contains *pc - STW_R1_R13(0)),
 *          return value in cr0.
 * test opcode interrupted by critical (asynchronous) exception; set CR_LOCK if
 *   *SRR0 == 'stw r1, ppc_exc_lock_std@sdarel(r13)'
	.macro	TEST_1ST_OPCODE_crit _REG

	lwz	\_REG, 0(\_REG)
	/*	opcode now in REG */

	/*	subtract upper 16bits of 'stw r1, 0(r13)' instruction */
	subis	\_REG, \_REG, STW_R1_R13(0)@h
	 * if what's left compares against the 'ppc_exc_lock_std@sdarel'
	 * address offset then we have a match...
	cmplwi	cr0, \_REG, ppc_exc_lock_std@sdarel


I guess, I have to rewrite this a bit.

Sebastian Huber, embedded brains GmbH

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