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Re: [PATCH] PR gas/16489: GAS doesn't complain about same register used for destination and index in AVX512 gather insn
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: "Michael V. Zolotukhin" <michael dot v dot zolotukhin at gmail dot com>
- Cc: Jan Beulich <JBeulich at suse dot com>, Binutils <binutils at sourceware dot org>
- Date: Wed, 22 Jan 2014 06:52:54 -0800
- Subject: Re: [PATCH] PR gas/16489: GAS doesn't complain about same register used for destination and index in AVX512 gather insn
- Authentication-results: sourceware.org; auth=none
- References: <20140122140229 dot GA44568 at msticlxl57 dot ims dot intel dot com>
On Wed, Jan 22, 2014 at 6:02 AM, Michael V. Zolotukhin
<michael.v.zolotukhin@gmail.com> wrote:
> Hi,
>
> Here is a fix for PR16489. Is it ok for trunk?
>
> gas/Changelog:
> 2014-01-21 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
>
> PR gas/16489
> * config/tc-i386.c (check_VecOperands): Add check for invalid
> register set in AVX512 gathers.
>
> gas/testsuite/Changelog:
> 2014-01-21 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
>
> PR gas/16489
> * gas/i386/vgather-check.s: Add tests for AVX512 gathers.
> * gas/i386/x86-64-vgather-check.s: Likewise.
> * gas/i386/vgather-check-error.l: Update correspondingly.
> * gas/i386/vgather-check-none.d: Likewise.
> * gas/i386/vgather-check-warn.d: Likewise.
> * gas/i386/vgather-check-warn.e: Likewise.
> * gas/i386/vgather-check.d: Likewise.
> * gas/i386/x86-64-vgather-check-error.l: Likewise.
> * gas/i386/x86-64-vgather-check-none.d: Likewise.
> * gas/i386/x86-64-vgather-check-warn.d: Likewise.
> * gas/i386/x86-64-vgather-check-warn.e: Likewise.
> * gas/i386/x86-64-vgather-check.d: Likewise.
>
> Thanks,
> Michael
>
>
> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
> index 147acdf..7f35f05 100644
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -4374,11 +4374,9 @@ check_VecOperands (const insn_template *t)
> if (i.reg_operands == 2 && !i.mask)
> {
> gas_assert (i.types[0].bitfield.regxmm
> - || i.types[0].bitfield.regymm
> - || i.types[0].bitfield.regzmm);
> + || i.types[0].bitfield.regymm);
> gas_assert (i.types[2].bitfield.regxmm
> - || i.types[2].bitfield.regymm
> - || i.types[2].bitfield.regzmm);
> + || i.types[2].bitfield.regymm);
You removed assert on operands 0 and 2, added
check on operand 1. Do your testcases cover
the removal of assert on operands 0 and 2?
> if (operand_check == check_none)
> return 0;
> if (register_number (i.op[0].regs)
> @@ -4395,6 +4393,22 @@ check_VecOperands (const insn_template *t)
> }
> as_warn (_("mask, index, and destination registers should be distinct"));
> }
> + else if (i.reg_operands == 1 && i.mask)
> + {
> + if ((i.types[1].bitfield.regymm
> + || i.types[1].bitfield.regzmm)
Will operand 1 ever not be YMM/ZMM registers?
> + && (register_number (i.op[1].regs)
> + == register_number (i.index_reg)))
> + {
> + if (operand_check == check_error)
> + {
> + i.error = invalid_vector_register_set;
> + return 1;
> + }
> + if (operand_check != check_none)
> + as_warn (_("index and destination registers should be distinct"));
> + }
> + }
> }
>
>
--
H.J.