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[RFC PATCH] bfd/elf32-arm.c: Set st_value to zero for undefined symbols.


I'm not sure what the implications of this patch are, so I thought I would
post it here in the hope that someone can explain what might break.

The issue comes from a report that Qt does not work correctly on ARM when
built with -Bsymbolic:

http://lists.linaro.org/pipermail/linaro-toolchain/2014-January/003942.html

Unless point_equality_needed is set then set st_value to be zero
for undefined symbols.

bfd/ChangeLog:

2014-01-10  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (elf32_arm_check_relocs): Set
	pointer_equality_needed for absolute references within
	executable links.
	(elf32_arm_finish_dynamic_symbol): Set st_value to zero
	unless pointer_equality_needed is set.

ld/testsuite/ChangeLog:

2014-01-10  Will Newton  <will.newton@linaro.org>

	* ld-arm/ifunc-14.rd: Update symbol values.
---
 bfd/elf32-arm.c                 | 7 ++++++-
 ld/testsuite/ld-arm/ifunc-14.rd | 4 ++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 7216244..a999b64 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -12681,6 +12681,11 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	    /* Fall through.  */
 	  case R_ARM_ABS32:
 	  case R_ARM_ABS32_NOI:
+	    if (h != NULL && info->executable)
+	      {
+		h->pointer_equality_needed = 1;
+	      }
+	    /* Fall through.  */
 	  case R_ARM_REL32:
 	  case R_ARM_REL32_NOI:
 	  case R_ARM_MOVW_PREL_NC:
@@ -14046,7 +14051,7 @@ elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
 	     Otherwise, the PLT entry would provide a definition for
 	     the symbol even if the symbol wasn't defined anywhere,
 	     and so the symbol would never be NULL.  */
-	  if (!h->ref_regular_nonweak)
+	  if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
 	    sym->st_value = 0;
 	}
       else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
diff --git a/ld/testsuite/ld-arm/ifunc-14.rd b/ld/testsuite/ld-arm/ifunc-14.rd
index 59ea29b..9c44092 100644
--- a/ld/testsuite/ld-arm/ifunc-14.rd
+++ b/ld/testsuite/ld-arm/ifunc-14.rd
@@ -8,5 +8,5 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries:
 
 Relocation section '\.rel\.plt' at offset 0x8020 contains 2 entries:
  Offset     Info    Type            Sym\.Value  Sym\. Name
-0001100c  ......16 R_ARM_JUMP_SLOT   00009014   f2t
-00011010  ......16 R_ARM_JUMP_SLOT   00009020   f2
+0001100c  ......16 R_ARM_JUMP_SLOT   00000000   f2t
+00011010  ......16 R_ARM_JUMP_SLOT   00000000   f2
-- 
1.8.1.4


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