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Re: [PATCH] Add MIPS ufr macro instruction
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: "Maciej W. Rozycki" <macro at codesourcery dot com>
- Cc: Andrew Bennett <Andrew dot Bennett at imgtec dot com>, "binutils\ at sourceware dot org" <binutils at sourceware dot org>
- Date: Sat, 14 Dec 2013 10:13:30 +0000
- Subject: Re: [PATCH] Add MIPS ufr macro instruction
- Authentication-results: sourceware.org; auth=none
- References: <0DA23CC379F5F945ACB41CF394B982774C835E at LEMAIL01 dot le dot imgtec dot org> <87vc01erxi dot fsf at talisman dot default> <87siuzcpp4 dot fsf at talisman dot default> <0DA23CC379F5F945ACB41CF394B982774CB15B at LEMAIL01 dot le dot imgtec dot org> <0DA23CC379F5F945ACB41CF394B982774CE268 at LEMAIL01 dot le dot imgtec dot org> <8738mm3pgb dot fsf at talisman dot default> <alpine dot DEB dot 1 dot 10 dot 1311241820110 dot 21686 at tp dot orcam dot me dot uk> <0DA23CC379F5F945ACB41CF394B982774DAC1A at LEMAIL01 dot le dot imgtec dot org> <87fvq07ufx dot fsf at talisman dot default> <0DA23CC379F5F945ACB41CF394B982774DE91E at LEMAIL01 dot le dot imgtec dot org> <87vbysiu3a dot fsf at sandifor-thinkpad dot stglab dot manchester dot uk dot ibm dot com> <alpine dot DEB dot 1 dot 10 dot 1312131823410 dot 19368 at tp dot orcam dot me dot uk>
"Maciej W. Rozycki" <email@example.com> writes:
> On Fri, 13 Dec 2013, Richard Sandiford wrote:
>> Looks good, thanks, but is there any reason not to use mips_cp1_names_mips3264
>> for all MIPS32 and MIPS64 targets? I realise some of them don't have an FPU,
>> but if we see (presumably emulated) FPU instructions anyway, then I think we
>> might as well follow the architecture names for the registers.
> Rev. 1 FPUs only had the FIR, FCCR, FEXR, FENR and FCSR registers. Older
> ISAs only had the FIR and FCSR registers. How about we have separate
> lists just as with CP0? Furthermore I don't think these additional lists
> should be a prerequisite for the acceptance of this patch.
I agree extra lists shouldn't be a requirement. And until more are
added I think the pragmatic thing to do is to use the full list for
"mips32" and "mips64" too, which is what Andrew's patch did. But if
we do that then I think we should also use the full list for specific
ISA_MIPS32 and ISA_MIPS64 processors as well the generic ISA.
>> If you agree, then the patch is OK with every ISA_MIPS32* and ISA_MIPS64*
>> entry having mips_cp1_names_mips3264. If not then let me know :-)
> Shouldn't there be a complementing GAS part though?
I think that's future work too. There's no corresponding gas support
for CP0 registers (or any notion of ".set arch"-specific registers really),
so it wouldn't be a trivial patch.