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Re: [PATCH/AArch64 3/3] * opcodes/aarch64-tbl.h (aarch64_opcode_table): Add back the "lost" instruction aliases for scalar compare and vector compare.


thanks for the clarification and pointing out the change in, which only 
applies to 4.9 (I didn’t check the sources carefully enough last night), but seems to
have never made it into the 4.8.2 tree.

On 11 Dec 2013, at 10:38 , James Greenhalgh <> wrote:

> In fact, we have this explicit comment in aarch64/ calling
> out the absence of the FCMLE and FCMLT 3 register variants and
> describing the workaround.
> ;; For comparison operators we use the FCM* and CM* instructions.
> ;; As there are no CMLE or CMLT instructions which act on 3 vector
> ;; operands, we must use CMGE or CMGT and swap the order of the
> ;; source operands.
> If you are seeing other instructions generated it is either a bug,
> or some other pattern.

I just rechecked against a fresh checkout of 4.8.2 and still don't see the n_optab 
iterator there, so it appears as if that change didn’t make it onto the 4.8 tree.

The sources in 4.8.2 still show:
>   fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>
>   fcm<cmp>\t%<v>0<Vmtype>, %<v>1<Vmtype>, 0”
with the iterator
> (define_int_attr cmp [(UNSPEC_CMGE "ge") (UNSPEC_CMGT "gt")
>                       (UNSPEC_CMLE "le") (UNSPEC_CMLT "lt")
>                       (UNSPEC_CMEQ "eq")
>                       (UNSPEC_CMHS "hs") (UNSPEC_CMHI "hi")
>                       (UNSPEC_CMTST "tst")])

Note, that this breaks 481.wrf from SPEC at -O3.


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