This will by itself introduce testsuite failures which get addressed by subsequent patches. gas/testsuite/ 2013-10-08 Jan Beulich * gas/i386/mpx-inval-2.[sl]: New. * gas/i386/i386.exp: Run new test. * gas/i386/mpx.s: Remove invalid tests involving 16-bit register operands to bndc[lnu]. * gas/i386/mpx.d: Adjust accordingly. * gas/i386/x86-64-mpx.s: Remove invalid tests involving 16-bit register operands to bndc[lnu]. * gas/i386/x86-64-mpx.d: Adjust accordingly. * gas/i386/x86-64-mpx-inval-2.s: Add tests for invalid uses of RIP- relative addressing, 16- and 32-bit register operands, as well as a special case of Intel mode memory operands. * gas/i386/x86-64-mpx-inval-2.l: Adjust accordingly and generalize. --- 2013-10-07/gas/testsuite/gas/i386/i386.exp +++ 2013-10-07/gas/testsuite/gas/i386/i386.exp @@ -267,6 +267,7 @@ if [expr ([istarget "i*86-*-*"] || [ist run_dump_test "smap" run_dump_test "mpx" run_list_test "mpx-inval-1" "-al" + run_list_test "mpx-inval-2" "-al" run_dump_test "mpx-add-bnd-prefix" run_dump_test "sha" --- /dev/null +++ 2013-10-07/gas/testsuite/gas/i386/mpx-inval-2.l @@ -0,0 +1,145 @@ +.*: Assembler messages: +.*:5: Error: 16-bit addressing isn't allowed in MPX instructions +.*:6: Error: 16-bit addressing isn't allowed in MPX instructions +.*:7: Error: 16-bit addressing isn't allowed in MPX instructions +.*:8: Error: 16-bit addressing isn't allowed in MPX instructions +.*:9: Error: 16-bit addressing isn't allowed in MPX instructions +.*:10: Error: 16-bit addressing isn't allowed in MPX instructions +.*:11: Error: 16-bit addressing isn't allowed in MPX instructions +.*:12: Error: 16-bit addressing isn't allowed in MPX instructions +.*:14: Error: operand type mismatch for `bndcl' +.*:15: Error: operand type mismatch for `bndcn' +.*:16: Error: operand type mismatch for `bndcu' +.*:19: Error: 16-bit addressing isn't allowed in MPX instructions +.*:20: Error: 16-bit addressing isn't allowed in MPX instructions +.*:21: Error: 16-bit addressing isn't allowed in MPX instructions +.*:22: Error: 16-bit addressing isn't allowed in MPX instructions +.*:23: Error: 16-bit addressing isn't allowed in MPX instructions +.*:24: Error: 16-bit addressing isn't allowed in MPX instructions +.*:25: Error: 16-bit addressing isn't allowed in MPX instructions +.*:26: Error: 16-bit addressing isn't allowed in MPX instructions +.*:28: Error: operand type mismatch for `bndcl' +.*:29: Error: operand type mismatch for `bndcn' +.*:30: Error: operand type mismatch for `bndcu' +.*:35: Error: 16-bit addressing isn't allowed in MPX instructions +.*:36: Error: 16-bit addressing isn't allowed in MPX instructions +.*:37: Error: 16-bit addressing isn't allowed in MPX instructions +.*:38: Error: 16-bit addressing isn't allowed in MPX instructions +.*:39: Error: 16-bit addressing isn't allowed in MPX instructions +.*:40: Error: 16-bit addressing isn't allowed in MPX instructions +.*:41: Error: 16-bit addressing isn't allowed in MPX instructions +.*:42: Error: 16-bit addressing isn't allowed in MPX instructions +.*:44: Error: operand type mismatch for `bndcl' +.*:45: Error: operand type mismatch for `bndcn' +.*:46: Error: operand type mismatch for `bndcu' +.*:49: Error: 16-bit addressing isn't allowed in MPX instructions +.*:50: Error: 16-bit addressing isn't allowed in MPX instructions +.*:51: Error: 16-bit addressing isn't allowed in MPX instructions +.*:52: Error: 16-bit addressing isn't allowed in MPX instructions +.*:53: Error: 16-bit addressing isn't allowed in MPX instructions +.*:54: Error: 16-bit addressing isn't allowed in MPX instructions +.*:55: Error: 16-bit addressing isn't allowed in MPX instructions +.*:56: Error: 16-bit addressing isn't allowed in MPX instructions +.*:58: Error: operand type mismatch for `bndcl' +.*:59: Error: operand type mismatch for `bndcn' +.*:60: Error: operand type mismatch for `bndcu' +GAS LISTING .* +#... +[ ]*[1-9][0-9]*[ ]+mpx32: +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcl \(%bx,%si\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcn \(%bx,%di\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcu \(%bp,%si\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndldx \(%bp,%di\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmk \(%bx\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov \(%bp\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov %bnd0, \(%si\) +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndstx %bnd0, \(%di\) +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcl bnd0, \[bx\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcn bnd0, \[bp\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcu bnd0, \[si\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndldx bnd0, \[di\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmk bnd0, \[bx\+si\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov bnd0, \[bx\+di\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov \[bp\+si\], bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndstx \[bp\+di\], bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+mpx16: +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcl \(%bx,%si\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcn \(%bx,%di\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcu \(%bp,%si\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndldx \(%bp,%di\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmk \(%bx\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov \(%bp\), %bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov %bnd0, \(%si\) +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndstx %bnd0, \(%di\) +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcl bnd0, \[bx\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcn bnd0, \[bp\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndcu bnd0, \[si\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndldx bnd0, \[di\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmk bnd0, \[bx\+si\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov bnd0, \[bx\+di\] +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndmov \[bp\+si\], bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+[?0-9A-F ]*bndstx \[bp\+di\], bnd0 +\*\*\*\* Error:16-bit addressing isn't allowed in MPX instructions +#... --- /dev/null +++ 2013-10-07/gas/testsuite/gas/i386/mpx-inval-2.s @@ -0,0 +1,60 @@ +# MPX instructions + .text + .code32 +mpx32: + bndcl (%bx,%si), %bnd0 + bndcn (%bx,%di), %bnd0 + bndcu (%bp,%si), %bnd0 + bndldx (%bp,%di), %bnd0 + bndmk (%bx), %bnd0 + bndmov (%bp), %bnd0 + bndmov %bnd0, (%si) + bndstx %bnd0, (%di) + + bndcl %di, %bnd1 + bndcn %si, %bnd2 + bndcu %bp, %bnd3 + + .intel_syntax noprefix + bndcl bnd0, [bx] + bndcn bnd0, [bp] + bndcu bnd0, [si] + bndldx bnd0, [di] + bndmk bnd0, [bx+si] + bndmov bnd0, [bx+di] + bndmov [bp+si], bnd0 + bndstx [bp+di], bnd0 + + bndcl bnd3, ax + bndcn bnd2, cx + bndcu bnd1, dx + + .att_syntax prefix + .code16 +mpx16: + bndcl (%bx,%si), %bnd0 + bndcn (%bx,%di), %bnd0 + bndcu (%bp,%si), %bnd0 + bndldx (%bp,%di), %bnd0 + bndmk (%bx), %bnd0 + bndmov (%bp), %bnd0 + bndmov %bnd0, (%si) + bndstx %bnd0, (%di) + + bndcl %di, %bnd1 + bndcn %si, %bnd2 + bndcu %bp, %bnd3 + + .intel_syntax noprefix + bndcl bnd0, [bx] + bndcn bnd0, [bp] + bndcu bnd0, [si] + bndldx bnd0, [di] + bndmk bnd0, [bx+si] + bndmov bnd0, [bx+di] + bndmov [bp+si], bnd0 + bndstx [bp+di], bnd0 + + bndcl bnd3, ax + bndcn bnd2, cx + bndcu bnd1, dx --- 2013-10-07/gas/testsuite/gas/i386/mpx.d +++ 2013-10-07/gas/testsuite/gas/i386/mpx.d @@ -6,7 +6,7 @@ Disassembly of section .text: -0+ : +0+ : [ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%eax\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1b 0d 99 03 00 00 bndmk 0x399,%bnd1 [ ]*[a-f0-9]+: f3 0f 1b 4a 03 bndmk 0x3\(%edx\),%bnd1 @@ -29,7 +29,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 1a d0 bndmov %bnd0,%bnd2 [ ]*[a-f0-9]+: f3 0f 1a 09 bndcl \(%ecx\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a c9 bndcl %ecx,%bnd1 -[ ]*[a-f0-9]+: f3 0f 1a c8 bndcl %eax,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0d 99 03 00 00 bndcl 0x399,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 4a 03 bndcl 0x3\(%edx\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0c 08 bndcl \(%eax,%ecx,1\),%bnd1 @@ -37,7 +36,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 0f 1a 4c 01 03 bndcl 0x3\(%ecx,%eax,1\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 09 bndcu \(%ecx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a c9 bndcu %ecx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1a c8 bndcu %eax,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0d 99 03 00 00 bndcu 0x399,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 4a 03 bndcu 0x3\(%edx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0c 08 bndcu \(%eax,%ecx,1\),%bnd1 @@ -45,7 +43,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f2 0f 1a 4c 01 03 bndcu 0x3\(%ecx,%eax,1\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 09 bndcn \(%ecx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b c9 bndcn %ecx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1b c8 bndcn %eax,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0d 99 03 00 00 bndcn 0x399,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 4a 03 bndcn 0x3\(%edx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0c 08 bndcn \(%eax,%ecx,1\),%bnd1 @@ -65,10 +62,10 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 1a 93 34 12 00 00 bndldx 0x1234\(%ebx\),%bnd2 [ ]*[a-f0-9]+: 0f 1a 53 03 bndldx 0x3\(%ebx\),%bnd2 [ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%edx\),%bnd1 -[ ]*[a-f0-9]+: f2 e8 6f 01 00 00 bnd call 2c1 +[ ]*[a-f0-9]+: f2 e8 .. .. 00 00 bnd call [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff 10 bnd call \*\(%eax\) -[ ]*[a-f0-9]+: f2 0f 84 65 01 00 00 bnd je 2c1 -[ ]*[a-f0-9]+: f2 e9 5f 01 00 00 bnd jmp 2c1 +[ ]*[a-f0-9]+: f2 0f 84 .. .. 00 00 bnd je [0-9a-f]+ +[ ]*[a-f0-9]+: f2 e9 .. .. 00 00 bnd jmp [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff 21 bnd jmp \*\(%ecx\) [ ]*[a-f0-9]+: f2 c3 bnd ret [ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%eax\),%bnd1 @@ -93,7 +90,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 1a c8 bndmov %bnd0,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 08 bndcl \(%eax\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a c9 bndcl %ecx,%bnd1 -[ ]*[a-f0-9]+: f3 0f 1a c8 bndcl %eax,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0d 99 03 00 00 bndcl 0x399,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 49 03 bndcl 0x3\(%ecx\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0c 08 bndcl \(%eax,%ecx,1\),%bnd1 @@ -101,7 +97,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 0f 1a 4c 02 03 bndcl 0x3\(%edx,%eax,1\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 08 bndcu \(%eax\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a c9 bndcu %ecx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1a c8 bndcu %eax,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0d 99 03 00 00 bndcu 0x399,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 49 03 bndcu 0x3\(%ecx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0c 08 bndcu \(%eax,%ecx,1\),%bnd1 @@ -109,7 +104,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f2 0f 1a 4c 02 03 bndcu 0x3\(%edx,%eax,1\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 08 bndcn \(%eax\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b c9 bndcn %ecx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1b c8 bndcn %eax,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0d 99 03 00 00 bndcn 0x399,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 49 03 bndcn 0x3\(%ecx\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0c 08 bndcn \(%eax,%ecx,1\),%bnd1 @@ -127,13 +121,13 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 1a 9a 99 03 00 00 bndldx 0x399\(%edx\),%bnd3 [ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%ebx,1\),%bnd2 [ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%edx\),%bnd1 -[ ]*[a-f0-9]+: f2 e8 0e 00 00 00 bnd call 2c1 +[ ]*[a-f0-9]+: f2 e8 .. 00 00 00 bnd call [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff d0 bnd call \*%eax -[ ]*[a-f0-9]+: f2 74 08 bnd je 2c1 -[ ]*[a-f0-9]+: f2 eb 05 bnd jmp 2c1 +[ ]*[a-f0-9]+: f2 74 .. bnd je [0-9a-f]+ +[ ]*[a-f0-9]+: f2 eb .. bnd jmp [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff e1 bnd jmp \*%ecx [ ]*[a-f0-9]+: f2 c3 bnd ret -0+2c1 : +[0-9a-f]+ : [ ]*[a-f0-9]+: f2 c3 bnd ret #pass --- 2013-10-07/gas/testsuite/gas/i386/mpx.s +++ 2013-10-07/gas/testsuite/gas/i386/mpx.s @@ -30,7 +30,6 @@ ### bndcl bndcl (%ecx), %bnd1 bndcl %ecx, %bnd1 - bndcl %ax, %bnd1 bndcl (0x399), %bnd1 bndcl 0x3(%edx), %bnd1 bndcl (%eax,%ecx), %bnd1 @@ -40,7 +39,6 @@ ### bndcu bndcu (%ecx), %bnd1 bndcu %ecx, %bnd1 - bndcu %ax, %bnd1 bndcu (0x399), %bnd1 bndcu 0x3(%edx), %bnd1 bndcu (%eax,%ecx), %bnd1 @@ -50,7 +48,6 @@ ### bndcn bndcn (%ecx), %bnd1 bndcn %ecx, %bnd1 - bndcn %ax, %bnd1 bndcn (0x399), %bnd1 bndcn 0x3(%edx), %bnd1 bndcn (%eax,%ecx), %bnd1 @@ -111,7 +108,6 @@ ### bndcl bndcl bnd1, [eax] bndcl bnd1, ecx - bndcl bnd1, ax bndcl bnd1, [0x399] bndcl bnd1, [ecx+0x3] bndcl bnd1, [eax+ecx] @@ -121,7 +117,6 @@ ### bndcu bndcu bnd1, [eax] bndcu bnd1, ecx - bndcu bnd1, ax bndcu bnd1, [0x399] bndcu bnd1, [ecx+0x3] bndcu bnd1, [eax+ecx] @@ -131,7 +126,6 @@ ### bndcn bndcn bnd1, [eax] bndcn bnd1, ecx - bndcn bnd1, ax bndcn bnd1, [0x399] bndcn bnd1, [ecx+0x3] bndcn bnd1, [eax+ecx] --- 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l +++ 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l @@ -1,173 +1,213 @@ .*: Assembler messages: -.*:6: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:7: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:10: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:11: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:13: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:14: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:17: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:18: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:21: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:22: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:25: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:26: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:29: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:30: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:33: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:34: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:37: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:38: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:41: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:42: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:44: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:45: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:48: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:49: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:52: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:53: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:56: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:57: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:60: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:61: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:64: Error: 32-bit address isn't allowed in 64-bit MPX instructions. -.*:65: Error: 32-bit address isn't allowed in 64-bit MPX instructions. +.*:6: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:7: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:8: Error: `\(%rip\)' cannot be used here +.*:11: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:12: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:14: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:15: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:18: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:19: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:20: Warning: using `%rcx' instead of `%ecx' for `bndcl' +.*:21: Error: operand type mismatch for `bndcl' +.*:24: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:25: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:26: Warning: using `%rcx' instead of `%ecx' for `bndcu' +.*:27: Error: operand type mismatch for `bndcu' +.*:30: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:31: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:32: Warning: using `%rcx' instead of `%ecx' for `bndcn' +.*:33: Error: operand type mismatch for `bndcn' +.*:36: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:37: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:38: Warning: register scaling is being ignored here +.*:39: Error: `base\(%rip\)' cannot be used here +.*:42: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:43: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:44: Warning: register scaling is being ignored here +.*:45: Error: `base\(%rip\)' cannot be used here +.*:48: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:49: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:50: Error: `\[rip\]' cannot be used here +.*:51: Error: `\[rax\+rsp\]' is not a valid base/index expression +.*:54: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:55: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:57: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:58: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:61: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:62: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:63: Warning: using `rax' instead of `eax' for `bndcl' +.*:64: Error: operand type mismatch for `bndcl' +.*:67: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:68: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:69: Warning: using `rax' instead of `eax' for `bndcu' +.*:70: Error: operand type mismatch for `bndcu' +.*:73: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:74: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:75: Warning: using `rax' instead of `eax' for `bndcn' +.*:76: Error: operand type mismatch for `bndcn' +.*:79: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:80: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:81: Warning: register scaling is being ignored here +.*:82: Error: `\[rip\+base\]' cannot be used here +.*:83: Error: `\[rax\+rsp\]' is not a valid base/index expression +.*:86: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:87: Warning: 32-bit addressing is ignored in 64-bit MPX instructions +.*:88: Warning: register scaling is being ignored here +.*:89: Error: `\[rip\+base\]' cannot be used here +.*:90: Error: `\[rax\+rsp\]' is not a valid base/index expression GAS LISTING .* - - -[ ]*1[ ]+\# MPX instructions -[ ]*2[ ]+\.allow_index_reg -[ ]*3[ ]+\.text -[ ]*4[ ]+ -[ ]*5[ ]+\#\#\# bndmk -[ ]*6[ ]+\?\?\?\? 67F30F1B bndmk \(%eax\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*6[ ]+08 -[ ]*7[ ]+\?\?\?\? 67F30F1B bndmk 0x3\(%ecx,%ebx,1\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*7[ ]+4C1903 -[ ]*8[ ]+ -[ ]*9[ ]+\#\#\# bndmov -[ ]*10[ ]+\?\?\?\? 6766410F bndmov \(%r8d\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*10[ ]+1A08 -[ ]*11[ ]+\?\?\?\? 6766410F bndmov 0x3\(%r9d,%edx,1\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*11[ ]+1A4C1103 -[ ]*12[ ]+ -[ ]*13[ ]+\?\?\?\? 67660F1B bndmov %bnd1, \(%eax\) -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*13[ ]+08 -[ ]*14[ ]+\?\?\?\? 67660F1B bndmov %bnd1, 0x3\(%ecx,%eax,1\) -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*14[ ]+4C0103 -[ ]*15[ ]+ -[ ]*16[ ]+\#\#\# bndcl -[ ]*17[ ]+\?\?\?\? 67F30F1A bndcl \(%ecx\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*17[ ]+09 -[ ]*18[ ]+\?\?\?\? 67F30F1A bndcl 0x3\(%ecx,%eax,1\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*18[ ]+4C0103 -[ ]*19[ ]+ -[ ]*20[ ]+\#\#\# bndcu -[ ]*21[ ]+\?\?\?\? 67F20F1A bndcu \(%ecx\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*21[ ]+09 -[ ]*22[ ]+\?\?\?\? 67F20F1A bndcu 0x3\(%ecx,%eax,1\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*22[ ]+4C0103 -[ ]*23[ ]+ -[ ]*24[ ]+\#\#\# bndcn -[ ]*25[ ]+\?\?\?\? 67F20F1B bndcn \(%ecx\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*25[ ]+09 -[ ]*26[ ]+\?\?\?\? 67F20F1B bndcn 0x3\(%ecx,%eax,1\), %bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*26[ ]+4C0103 -[ ]*27[ ]+ -[ ]*28[ ]+\#\#\# bndstx -[ ]*29[ ]+\?\?\?\? 670F1B44 bndstx %bnd0, 0x3\(%eax,%ebx,1\) -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*29[ ]+1803 -[ ]*30[ ]+\?\?\?\? 670F1B53 bndstx %bnd2, 3\(%ebx,1\) -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. - GAS LISTING .* - - -[ ]*30[ ]+03 -[ ]*31[ ]+ -[ ]*32[ ]+\#\#\# bndldx -[ ]*33[ ]+\?\?\?\? 670F1A44 bndldx 0x3\(%eax,%ebx,1\), %bnd0 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*33[ ]+1803 -[ ]*34[ ]+\?\?\?\? 670F1A53 bndldx 3\(%ebx,1\), %bnd2 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*34[ ]+03 -[ ]*35[ ]+ -[ ]*36[ ]+\.intel_syntax noprefix -[ ]*37[ ]+\?\?\?\? 67F30F1B bndmk bnd1, \[eax\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*37[ ]+08 -[ ]*38[ ]+\?\?\?\? 67F30F1B bndmk bnd1, \[edx\+1\*eax\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*38[ ]+4C0203 -[ ]*39[ ]+ -[ ]*40[ ]+\#\#\# bndmov -[ ]*41[ ]+\?\?\?\? 67660F1A bndmov bnd1, \[eax\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*41[ ]+08 -[ ]*42[ ]+\?\?\?\? 67660F1A bndmov bnd1, \[edx\+1\*eax\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*42[ ]+4C0203 -[ ]*43[ ]+ -[ ]*44[ ]+\?\?\?\? 67660F1B bndmov \[eax\], bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*44[ ]+08 -[ ]*45[ ]+\?\?\?\? 67660F1B bndmov \[edx\+1\*eax\+0x3\], bnd1 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*45[ ]+4C0203 -[ ]*46[ ]+ -[ ]*47[ ]+\#\#\# bndcl -[ ]*48[ ]+\?\?\?\? 67F30F1A bndcl bnd1, \[eax\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*48[ ]+08 -[ ]*49[ ]+\?\?\?\? 67F30F1A bndcl bnd1, \[edx\+1\*eax\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*49[ ]+4C0203 -[ ]*50[ ]+ -[ ]*51[ ]+\#\#\# bndcu -[ ]*52[ ]+\?\?\?\? 67F20F1A bndcu bnd1, \[eax\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*52[ ]+08 -[ ]*53[ ]+\?\?\?\? 67F20F1A bndcu bnd1, \[edx\+1\*eax\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*53[ ]+4C0203 -[ ]*54[ ]+ -[ ]*55[ ]+\#\#\# bndcn -[ ]*56[ ]+\?\?\?\? 67F20F1B bndcn bnd1, \[eax\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*56[ ]+08 -[ ]*57[ ]+\?\?\?\? 67F20F1B bndcn bnd1, \[edx\+1\*eax\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*57[ ]+4C0203 -[ ]*58[ ]+ - GAS LISTING .* - - -[ ]*59[ ]+\#\#\# bndstx -[ ]*60[ ]+\?\?\?\? 670F1B44 bndstx \[eax\+ebx\*1\+0x3\], bnd0 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*60[ ]+1803 -[ ]*61[ ]+\?\?\?\? 670F1B14 bndstx \[1\*ebx\+3\], bnd2 -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*61[ ]+1D030000 -[ ]*61[ ]+00 -[ ]*62[ ]+ -[ ]*63[ ]+\#\#\# bndldx -[ ]*64[ ]+\?\?\?\? 670F1A44 bndldx bnd0, \[eax\+ebx\*1\+0x3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*64[ ]+1803 -[ ]*65[ ]+\?\?\?\? 670F1A14 bndldx bnd2, \[1\*ebx\+3\] -\*\*\*\* Error:32-bit address isn't allowed in 64-bit MPX instructions\. -[ ]*65[ ]+1D030000 -[ ]*65[ ]+00 +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndmk +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1B bndmk \(%eax\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1B bndmk 0x3\(%ecx,%ebx,1\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+bndmk \(%rip\), %bnd3 +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndmov +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 6766410F bndmov \(%r8d\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 6766410F bndmov 0x3\(%r9d,%edx,1\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1B bndmov %bnd1, \(%eax\) +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1B bndmov %bnd1, 0x3\(%ecx,%eax,1\) +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcl +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1A bndcl \(%ecx\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1A bndcl 0x3\(%ecx,%eax,1\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F30F1AC9 bndcl %ecx, %bnd1 +\*\*\*\* Warning:using `%rcx' instead of `%ecx' for `bndcl' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcu +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1A bndcu \(%ecx\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1A bndcu 0x3\(%ecx,%eax,1\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F20F1AC9 bndcu %ecx, %bnd1 +\*\*\*\* Warning:using `%rcx' instead of `%ecx' for `bndcu' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcn +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1B bndcn \(%ecx\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1B bndcn 0x3\(%ecx,%eax,1\), %bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F20F1BC9 bndcn %ecx, %bnd1 +\*\*\*\* Warning:using `%rcx' instead of `%ecx' for `bndcn' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndstx +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1B44 bndstx %bnd0, 0x3\(%eax,%ebx,1\) +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1B53 bndstx %bnd2, 3\(%ebx,1\) +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 410F1B0C bndstx %bnd1, \(%r15,%rax,2\) +\*\*\*\* Warning:register scaling is being ignored here +#... +[ ]*[1-9][0-9]*[ ]+bndstx %bnd3, base\(%rip\) +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndldx +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1A44 bndldx 0x3\(%eax,%ebx,1\), %bnd0 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1A53 bndldx 3\(%ebx,1\), %bnd2 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 420F1A1C bndldx \(%rax,%r15,4\), %bnd3 +\*\*\*\* Warning:register scaling is being ignored here +#... +[ ]*[1-9][0-9]*[ ]+bndldx base\(%rip\), %bnd1 +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1B bndmk bnd1, \[eax\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1B bndmk bnd1, \[edx\+1\*eax\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+bndmk bnd3, \[rip\] +[ ]*[1-9][0-9]*[ ]+bndmk bnd2, \[rax\+rsp\] +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndmov +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1A bndmov bnd1, \[eax\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1A bndmov bnd1, \[edx\+1\*eax\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1B bndmov \[eax\], bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67660F1B bndmov \[edx\+1\*eax\+0x3\], bnd1 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcl +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1A bndcl bnd1, \[eax\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F30F1A bndcl bnd1, \[edx\+1\*eax\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F30F1AC8 bndcl bnd1, eax +\*\*\*\* Warning:using `rax' instead of `eax' for `bndcl' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcu +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1A bndcu bnd1, \[eax\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1A bndcu bnd1, \[edx\+1\*eax\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F20F1AC8 bndcu bnd1, eax +\*\*\*\* Warning:using `rax' instead of `eax' for `bndcu' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndcn +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1B bndcn bnd1, \[eax\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 67F20F1B bndcn bnd1, \[edx\+1\*eax\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? F20F1BC8 bndcn bnd1, eax +\*\*\*\* Warning:using `rax' instead of `eax' for `bndcn' +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndstx +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1B44 bndstx \[eax\+ebx\*1\+0x3\], bnd0 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1B14 bndstx \[1\*ebx\+3\], bnd2 +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 410F1B14 bndstx \[r8\+rdi\*4\], bnd2 +\*\*\*\* Warning:register scaling is being ignored here +#... +[ ]*[1-9][0-9]*[ ]+bndstx \[rip\+base\], bnd1 +[ ]*[1-9][0-9]*[ ]+bndstx \[rax\+rsp\], bnd3 +#... +[ ]*[1-9][0-9]*[ ]+\#\#\# bndldx +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1A44 bndldx bnd0, \[eax\+ebx\*1\+0x3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 670F1A14 bndldx bnd2, \[1\*ebx\+3\] +\*\*\*\* Warning:32-bit addressing is ignored in 64-bit MPX instructions +#... +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 420F1A14 bndldx bnd2, \[rdi\+r8\*8\] +\*\*\*\* Warning:register scaling is being ignored here +#... +[ ]*[1-9][0-9]*[ ]+bndldx bnd1, \[rip\+base\] +[ ]*[1-9][0-9]*[ ]+bndldx bnd3, \[rax\+rsp\] --- 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx-inval-2.s +++ 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx-inval-2.s @@ -5,6 +5,7 @@ ### bndmk bndmk (%eax), %bnd1 bndmk 0x3(%ecx,%ebx,1), %bnd1 + bndmk (%rip), %bnd3 ### bndmov bndmov (%r8d), %bnd1 @@ -16,26 +17,38 @@ ### bndcl bndcl (%ecx), %bnd1 bndcl 0x3(%ecx,%eax,1), %bnd1 + bndcl %ecx, %bnd1 + bndcl %cx, %bnd1 ### bndcu bndcu (%ecx), %bnd1 bndcu 0x3(%ecx,%eax,1), %bnd1 + bndcu %ecx, %bnd1 + bndcu %cx, %bnd1 ### bndcn bndcn (%ecx), %bnd1 bndcn 0x3(%ecx,%eax,1), %bnd1 + bndcn %ecx, %bnd1 + bndcn %cx, %bnd1 ### bndstx bndstx %bnd0, 0x3(%eax,%ebx,1) bndstx %bnd2, 3(%ebx,1) + bndstx %bnd1, (%r15,%rax,2) + bndstx %bnd3, base(%rip) ### bndldx bndldx 0x3(%eax,%ebx,1), %bnd0 bndldx 3(%ebx,1), %bnd2 + bndldx (%rax,%r15,4), %bnd3 + bndldx base(%rip), %bnd1 .intel_syntax noprefix bndmk bnd1, [eax] bndmk bnd1, [edx+1*eax+0x3] + bndmk bnd3, [rip] + bndmk bnd2, [rax+rsp] ### bndmov bndmov bnd1, [eax] @@ -47,19 +60,31 @@ ### bndcl bndcl bnd1, [eax] bndcl bnd1, [edx+1*eax+0x3] + bndcl bnd1, eax + bndcl bnd1, dx ### bndcu bndcu bnd1, [eax] bndcu bnd1, [edx+1*eax+0x3] + bndcu bnd1, eax + bndcu bnd1, dx ### bndcn bndcn bnd1, [eax] bndcn bnd1, [edx+1*eax+0x3] + bndcn bnd1, eax + bndcn bnd1, dx ### bndstx bndstx [eax+ebx*1+0x3], bnd0 bndstx [1*ebx+3], bnd2 + bndstx [r8+rdi*4], bnd2 + bndstx [rip+base], bnd1 + bndstx [rax+rsp], bnd3 ### bndldx bndldx bnd0, [eax+ebx*1+0x3] bndldx bnd2, [1*ebx+3] + bndldx bnd2, [rdi+r8*8] + bndldx bnd1, [rip+base] + bndldx bnd3, [rax+rsp] --- 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx.d +++ 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx.d @@ -6,7 +6,7 @@ Disassembly of section .text: -0+ : +0+ : [ ]*[a-f0-9]+: f3 41 0f 1b 0b bndmk \(%r11\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%rax\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1b 0c 25 99 03 00 00 bndmk 0x399,%bnd1 @@ -38,9 +38,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 1a d0 bndmov %bnd0,%bnd2 [ ]*[a-f0-9]+: f3 41 0f 1a 0b bndcl \(%r11\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 08 bndcl \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f3 49 0f 1a cb bndcl %r11,%bnd1 -[ ]*[a-f0-9]+: f3 48 0f 1a c9 bndcl %rcx,%bnd1 -[ ]*[a-f0-9]+: f3 0f 1a c8 bndcl %eax,%bnd1 +[ ]*[a-f0-9]+: f3 41 0f 1a cb bndcl %r11,%bnd1 +[ ]*[a-f0-9]+: f3 0f 1a c9 bndcl %rcx,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0c 25 99 03 00 00 bndcl 0x399,%bnd1 [ ]*[a-f0-9]+: f3 41 0f 1a 51 03 bndcl 0x3\(%r9\),%bnd2 [ ]*[a-f0-9]+: f3 0f 1a 50 03 bndcl 0x3\(%rax\),%bnd2 @@ -50,9 +49,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 42 0f 1a 4c 0b 03 bndcl 0x3\(%rbx,%r9,1\),%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1a 0b bndcu \(%r11\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 08 bndcu \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f2 49 0f 1a cb bndcu %r11,%bnd1 -[ ]*[a-f0-9]+: f2 48 0f 1a c9 bndcu %rcx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1a c8 bndcu %eax,%bnd1 +[ ]*[a-f0-9]+: f2 41 0f 1a cb bndcu %r11,%bnd1 +[ ]*[a-f0-9]+: f2 0f 1a c9 bndcu %rcx,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0c 25 99 03 00 00 bndcu 0x399,%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1a 51 03 bndcu 0x3\(%r9\),%bnd2 [ ]*[a-f0-9]+: f2 0f 1a 50 03 bndcu 0x3\(%rax\),%bnd2 @@ -62,9 +60,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f2 42 0f 1a 4c 0b 03 bndcu 0x3\(%rbx,%r9,1\),%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1b 0b bndcn \(%r11\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 08 bndcn \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f2 49 0f 1b cb bndcn %r11,%bnd1 -[ ]*[a-f0-9]+: f2 48 0f 1b c9 bndcn %rcx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1b c8 bndcn %eax,%bnd1 +[ ]*[a-f0-9]+: f2 41 0f 1b cb bndcn %r11,%bnd1 +[ ]*[a-f0-9]+: f2 0f 1b c9 bndcn %rcx,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0c 25 99 03 00 00 bndcn 0x399,%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1b 51 03 bndcn 0x3\(%r9\),%bnd2 [ ]*[a-f0-9]+: f2 0f 1b 50 03 bndcn 0x3\(%rax\),%bnd2 @@ -88,11 +85,11 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2 [ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2 [ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%rdx\),%bnd1 -[ ]*[a-f0-9]+: f2 e8 34 02 00 00 bnd callq 434 +[ ]*[a-f0-9]+: f2 e8 .. .. 00 00 bnd callq [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff 10 bnd callq \*\(%rax\) [ ]*[a-f0-9]+: f2 41 ff 13 bnd callq \*\(%r11\) -[ ]*[a-f0-9]+: f2 0f 84 26 02 00 00 bnd je 434 -[ ]*[a-f0-9]+: f2 e9 20 02 00 00 bnd jmpq 434 +[ ]*[a-f0-9]+: f2 0f 84 .. .. 00 00 bnd je [0-9a-f]+ +[ ]*[a-f0-9]+: f2 e9 .. .. 00 00 bnd jmpq [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff 21 bnd jmpq \*\(%rcx\) [ ]*[a-f0-9]+: f2 41 ff 24 24 bnd jmpq \*\(%r12\) [ ]*[a-f0-9]+: f2 c3 bnd retq @@ -127,9 +124,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f 1a d0 bndmov %bnd0,%bnd2 [ ]*[a-f0-9]+: f3 41 0f 1a 0b bndcl \(%r11\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 08 bndcl \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f3 49 0f 1a cb bndcl %r11,%bnd1 -[ ]*[a-f0-9]+: f3 48 0f 1a c9 bndcl %rcx,%bnd1 -[ ]*[a-f0-9]+: f3 0f 1a c8 bndcl %eax,%bnd1 +[ ]*[a-f0-9]+: f3 41 0f 1a cb bndcl %r11,%bnd1 +[ ]*[a-f0-9]+: f3 0f 1a c9 bndcl %rcx,%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 0c 25 99 03 00 00 bndcl 0x399,%bnd1 [ ]*[a-f0-9]+: f3 41 0f 1a 49 03 bndcl 0x3\(%r9\),%bnd1 [ ]*[a-f0-9]+: f3 0f 1a 48 03 bndcl 0x3\(%rax\),%bnd1 @@ -139,9 +135,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 42 0f 1a 4c 0b 03 bndcl 0x3\(%rbx,%r9,1\),%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1a 0b bndcu \(%r11\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 08 bndcu \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f2 49 0f 1a cb bndcu %r11,%bnd1 -[ ]*[a-f0-9]+: f2 48 0f 1a c9 bndcu %rcx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1a c8 bndcu %eax,%bnd1 +[ ]*[a-f0-9]+: f2 41 0f 1a cb bndcu %r11,%bnd1 +[ ]*[a-f0-9]+: f2 0f 1a c9 bndcu %rcx,%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 0c 25 99 03 00 00 bndcu 0x399,%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1a 49 03 bndcu 0x3\(%r9\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1a 48 03 bndcu 0x3\(%rax\),%bnd1 @@ -151,9 +146,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f2 42 0f 1a 4c 0b 03 bndcu 0x3\(%rbx,%r9,1\),%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1b 0b bndcn \(%r11\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 08 bndcn \(%rax\),%bnd1 -[ ]*[a-f0-9]+: f2 49 0f 1b cb bndcn %r11,%bnd1 -[ ]*[a-f0-9]+: f2 48 0f 1b c9 bndcn %rcx,%bnd1 -[ ]*[a-f0-9]+: f2 0f 1b c8 bndcn %eax,%bnd1 +[ ]*[a-f0-9]+: f2 41 0f 1b cb bndcn %r11,%bnd1 +[ ]*[a-f0-9]+: f2 0f 1b c9 bndcn %rcx,%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 0c 25 99 03 00 00 bndcn 0x399,%bnd1 [ ]*[a-f0-9]+: f2 41 0f 1b 49 03 bndcn 0x3\(%r9\),%bnd1 [ ]*[a-f0-9]+: f2 0f 1b 48 03 bndcn 0x3\(%rax\),%bnd1 @@ -177,15 +171,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2 [ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2 [ ]*[a-f0-9]+: 0f 1a 0a bndldx \(%rdx\),%bnd1 -[ ]*[a-f0-9]+: f2 e8 16 00 00 00 bnd callq 434 +[ ]*[a-f0-9]+: f2 e8 .. 00 00 00 bnd callq [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff d0 bnd callq \*%rax [ ]*[a-f0-9]+: f2 41 ff d3 bnd callq \*%r11 -[ ]*[a-f0-9]+: f2 74 0c bnd je 434 -[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 434 +[ ]*[a-f0-9]+: f2 74 .. bnd je [0-9a-f]+ +[ ]*[a-f0-9]+: f2 eb .. bnd jmp [0-9a-f]+ [ ]*[a-f0-9]+: f2 ff e1 bnd jmpq \*%rcx [ ]*[a-f0-9]+: f2 41 ff e4 bnd jmpq \*%r12 [ ]*[a-f0-9]+: f2 c3 bnd retq -0+434 : +[0-9a-f]+ : [ ]*[a-f0-9]+: f2 c3 bnd retq #pass --- 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx.s +++ 2013-10-07/gas/testsuite/gas/i386/x86-64-mpx.s @@ -41,7 +41,6 @@ bndcl (%rax), %bnd1 bndcl %r11, %bnd1 bndcl %rcx, %bnd1 - bndcl %ax, %bnd1 bndcl (0x399), %bnd1 bndcl 0x3(%r9), %bnd2 bndcl 0x3(%rax), %bnd2 @@ -55,7 +54,6 @@ bndcu (%rax), %bnd1 bndcu %r11, %bnd1 bndcu %rcx, %bnd1 - bndcu %ax, %bnd1 bndcu (0x399), %bnd1 bndcu 0x3(%r9), %bnd2 bndcu 0x3(%rax), %bnd2 @@ -69,7 +67,6 @@ bndcn (%rax), %bnd1 bndcn %r11, %bnd1 bndcn %rcx, %bnd1 - bndcn %ax, %bnd1 bndcn (0x399), %bnd1 bndcn 0x3(%r9), %bnd2 bndcn 0x3(%rax), %bnd2 @@ -147,7 +144,6 @@ bndcl bnd1, [rax] bndcl bnd1, r11 bndcl bnd1, rcx - bndcl bnd1, ax bndcl bnd1, [0x399] bndcl bnd1, [r9+0x3] bndcl bnd1, [rax+0x3] @@ -161,7 +157,6 @@ bndcu bnd1, [rax] bndcu bnd1, r11 bndcu bnd1, rcx - bndcu bnd1, ax bndcu bnd1, [0x399] bndcu bnd1, [r9+0x3] bndcu bnd1, [rax+0x3] @@ -175,7 +170,6 @@ bndcn bnd1, [rax] bndcn bnd1, r11 bndcn bnd1, rcx - bndcn bnd1, ax bndcn bnd1, [0x399] bndcn bnd1, [r9+0x3] bndcn bnd1, [rax+0x3]