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Re: [x86-64 psABI] RFC: Extend x86-64 PLT entry to support MPX

On Wed, Jul 24, 2013 at 11:53 AM, H.J. Lu <> wrote:
> On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor <> wrote:
>> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu <> wrote:
>>> introduces 4 bound registers, which will be used for parameter passing
>>> in x86-64.  Bound registers are cleared by branch instructions.  Branch
>>> instructions with BND prefix will keep bound register contents.
>> I took a very quick look at the doc.  Why shouldn't we run the kernel
>> with BNDPRESERVE = 1, to avoid this behaviour of clearing the bound
>> registers on branch instructions?  That would let us avoid these
>> issues.
> This doesn't work in case of legacy callees which return pointers.
> The bound registers will be incorrect since they are set in the
> last MPX function.  MPX callers will get wrong bounds on
> pointers returned by legacy callees

As far as I can see the compiler needs to know the pair of bound
registers associated with a pointer anyhow.  So if the compiler calls
some function and gets a pointer, it needs to know the bound registers
that go with that pointer.  Are you suggesting that not only are bound
registers passed as parameters to functions, they are also implicitly
returned by functions?


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