This is the mail archive of the mailing list for the binutils project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]


On Mon, 10 Jun 2013, Richard Sandiford wrote:

> > +{"tlbinv",  "",		0x0000437c, 0xffffffff,	INSN_TLB,		0,		I1	},
> > +{"tlbinvf", "",		0x0000537c, 0xffffffff,	INSN_TLB,		0,		I1	},
> Is the idea really to allow these for general microMIPS, even when EVA
> isn't selected?  There should be a test for it so, and a comment here
> saying why.

 These instructions are not a part of the EVA set.  They are optional, 
their presence wired to the CP0.Config4.IE field and required for certain 
MMU configurations.  OTOH the presence of the EVA instruction set is wired 
to the CP0.Config5.EVA bit and associated with segmentation control.  My 
understanding of the architecture manual is all systems that support the 
EVA feature must also support TLB maintenance via the TLBINV/F 
instructions, but not necessarily the other way round.

 So overall I think we want to have another knob, perhaps just -mtlbinv 
(name to be agreed upon), to control these instructions in addition to 
-meva rather than to enable them for from what would have to be 
-mips32r3/-mips64r3 (yes, we're at rev. 3 already in case someone missed 
it ;) ).  I don't think we've had a precedent where optional instructions 
are enabled unconditionally for a sufficiently high ISA level to possibly 
support them.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]