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[AArch64, Committed] Apply range checks only on resolved relocations.
- From: Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Tue, 28 May 2013 10:43:45 +0100
- Subject: [AArch64, Committed] Apply range checks only on resolved relocations.
Hi, This patch modifies AArch64 md_apply_fix such that range checks are
not applied to unresolved relocations. Applied.
/Marcus
gas/ChangeLog
2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/tc-aarch64.c (md_apply_fix): Move value range checking
inside fx_done condition.
gas/testsuite/ChangeLog
2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
* gas/aarch64/adr_1.d: New file.
* gas/aarch64/adr_1.s: New file.
* gas/aarch64/b_1.d: New file.
* gas/aarch64/b_1.s: New file.
* gas/aarch64/beq_1.d: New file.
* gas/aarch64/beq_1.s: New file.
* gas/aarch64/ldr_1.d: New file.
* gas/aarch64/ldr_1.s: New file.
* gas/aarch64/tbz_1.d: New file.
* gas/aarch64/tbz_1.s: New file.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 6cd7e9d..6af526d 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6341,14 +6341,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
- if (value & 3)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("pc-relative load offset not word aligned"));
- if (signed_overflow (value, 21))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("pc-relative load offset out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
+ if (value & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("pc-relative load offset not word aligned"));
+ if (signed_overflow (value, 21))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("pc-relative load offset out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_ld_lit_ofs_19 (value >> 2);
put_aarch64_insn (buf, insn);
@@ -6356,11 +6356,11 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
- if (signed_overflow (value, 21))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("pc-relative address offset out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
+ if (signed_overflow (value, 21))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("pc-relative address offset out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_adr_imm (value);
put_aarch64_insn (buf, insn);
@@ -6368,14 +6368,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_BRANCH19:
- if (value & 3)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("conditional branch target not word aligned"));
- if (signed_overflow (value, 21))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("conditional branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
+ if (value & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch target not word aligned"));
+ if (signed_overflow (value, 21))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_cond_branch_ofs_19 (value >> 2);
put_aarch64_insn (buf, insn);
@@ -6383,14 +6383,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_TSTBR14:
- if (value & 3)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("conditional branch target not word aligned"));
- if (signed_overflow (value, 16))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("conditional branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
+ if (value & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch target not word aligned"));
+ if (signed_overflow (value, 16))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("conditional branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_tst_branch_ofs_14 (value >> 2);
put_aarch64_insn (buf, insn);
@@ -6399,13 +6399,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_JUMP26:
case BFD_RELOC_AARCH64_CALL26:
- if (value & 3)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("branch target not word aligned"));
- if (signed_overflow (value, 28))
- as_bad_where (fixP->fx_file, fixP->fx_line, _("branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
+ if (value & 3)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("branch target not word aligned"));
+ if (signed_overflow (value, 28))
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_branch_ofs_26 (value >> 2);
put_aarch64_insn (buf, insn);
diff --git a/gas/testsuite/gas/aarch64/adr_1.d b/gas/testsuite/gas/aarch64/adr_1.d
new file mode 100644
index 0000000..bfaaece
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/adr_1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: 10000001 adr x1, 0 <bar>
+ 0: R_AARCH64_ADR_PREL_LO21 bar\+0x80000000
diff --git a/gas/testsuite/gas/aarch64/adr_1.s b/gas/testsuite/gas/aarch64/adr_1.s
new file mode 100644
index 0000000..e4ef262
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/adr_1.s
@@ -0,0 +1,5 @@
+// adr.s Test file for AArch64 adr.
+
+ .text
+
+ adr x1, bar + 0x80000000
diff --git a/gas/testsuite/gas/aarch64/b_1.d b/gas/testsuite/gas/aarch64/b_1.d
new file mode 100644
index 0000000..c093f66
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/b_1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: 14000000 b 0 <bar>
+ 0: R_AARCH64_JUMP26 bar\+0x8000000
diff --git a/gas/testsuite/gas/aarch64/b_1.s b/gas/testsuite/gas/aarch64/b_1.s
new file mode 100644
index 0000000..6de5607
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/b_1.s
@@ -0,0 +1,5 @@
+// b.s Test file for AArch64 b.
+
+ .text
+
+ b bar + 0x8000000
diff --git a/gas/testsuite/gas/aarch64/beq_1.d b/gas/testsuite/gas/aarch64/beq_1.d
new file mode 100644
index 0000000..4e3b0d1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/beq_1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: 54000000 b.eq 0 <bar>
+ 0: R_AARCH64_CONDBR19 bar\+0x100000
diff --git a/gas/testsuite/gas/aarch64/beq_1.s b/gas/testsuite/gas/aarch64/beq_1.s
new file mode 100644
index 0000000..085c8de
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/beq_1.s
@@ -0,0 +1,5 @@
+// b.s Test file for AArch64 b.
+
+ .text
+
+ beq bar + 0x100000
diff --git a/gas/testsuite/gas/aarch64/ldr_1.d b/gas/testsuite/gas/aarch64/ldr_1.d
new file mode 100644
index 0000000..95f6f1b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/ldr_1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: 58000001 ldr x1, 0 <bar>
+ 0: R_AARCH64_LD_PREL_LO19 bar\+0x100000
diff --git a/gas/testsuite/gas/aarch64/ldr_1.s b/gas/testsuite/gas/aarch64/ldr_1.s
new file mode 100644
index 0000000..8e4a14d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/ldr_1.s
@@ -0,0 +1,5 @@
+// ldr.s Test file for AArch64 ldr.
+
+ .text
+
+ ldr x1, bar + 0x100000
diff --git a/gas/testsuite/gas/aarch64/tbz_1.d b/gas/testsuite/gas/aarch64/tbz_1.d
new file mode 100644
index 0000000..8183a22
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tbz_1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: 36080000 tbz w0, #1, 0 <bar>
+ 0: R_AARCH64_TSTBR14 bar\+0x8000
diff --git a/gas/testsuite/gas/aarch64/tbz_1.s b/gas/testsuite/gas/aarch64/tbz_1.s
new file mode 100644
index 0000000..10a1a7f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tbz_1.s
@@ -0,0 +1,5 @@
+// tbz.s Test file for AArch64 tbz.
+
+ .text
+
+ tbz x0, #1, bar + 0x8000