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[GOLD] powerpc pr15354


Applied.

	PR gold/15354
	* powerpc.cc (Target_powerpc::make_brlt_section): Name section
	.branch_lt to match bfd ld.  Adjust comments throughout file.

Index: gold/powerpc.cc
===================================================================
RCS file: /cvs/src/src/gold/powerpc.cc,v
retrieving revision 1.88
diff -u -p -r1.88 powerpc.cc
--- gold/powerpc.cc	15 Mar 2013 08:40:49 -0000	1.88
+++ gold/powerpc.cc	11 Apr 2013 01:25:37 -0000
@@ -2588,8 +2588,8 @@ Target_powerpc<size, big_endian>::do_rel
 	  else
 	    off += i->data_size();
 	}
-      // If .brlt is part of this output section, then we have just
-      // done the offset adjustment.
+      // If .branch_lt is part of this output section, then we have
+      // just done the offset adjustment.
       os->clear_section_offsets_need_adjustment();
     }
 
@@ -3044,8 +3044,8 @@ Target_powerpc<size, big_endian>::make_b
       bool is_pic = parameters->options().output_is_position_independent();
       if (is_pic)
 	{
-	  // When PIC we can't fill in .brlt (like .plt it can be a
-	  // bss style section) but must initialise at runtime via
+	  // When PIC we can't fill in .branch_lt (like .plt it can be
+	  // a bss style section) but must initialise at runtime via
 	  // dynamic relocats.
 	  this->rela_dyn_section(layout);
 	  brlt_rel = new Reloc_section(false);
@@ -3057,7 +3057,7 @@ Target_powerpc<size, big_endian>::make_b
 	this->plt_->output_section()
 	  ->add_output_section_data(this->brlt_section_);
       else
-	layout->add_output_section_data(".brlt",
+	layout->add_output_section_data(".branch_lt",
 					(is_pic ? elfcpp::SHT_NOBITS
 					 : elfcpp::SHT_PROGBITS),
 					elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE,
@@ -3068,7 +3068,7 @@ Target_powerpc<size, big_endian>::make_b
     }
 }
 
-// Write out .brlt when non-PIC.
+// Write out .branch_lt when non-PIC.
 
 template<int size, bool big_endian>
 void

-- 
Alan Modra
Australia Development Lab, IBM


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