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Re: [Patch, AARCH64] gc-section tests for PLT related relocations


Thanks, Couple more minor tweaks...

On 09/04/13 07:16, Venkataramanan Kumar wrote:

2013-04-09  Venkataramanan Kumar  <>
         * ld-aarch64/gc-plt1.s: New gc section test.

New file.

         * ld-aarch64/gc-plt2.s: Likewise
         * ld-aarch64/gc-plt-hidden.s: Likewise
         * ld-aarch64/gc-plt-main.s: Likewise
         * ld-aarch64/gc-relocs-257.s: Likewise
         * ld-aarch64/gc-plt-relocs.d: Update expected objdump
         * ld-aarch64/gc-relocs-257.d: Likewise
         * ld-aarch64/gc-relocs-257-dyn.d: Likewise
         * ld-aarch64/aarch64-elf.exp: add tests

ChangeLog entries are full sentences therefore they start with a capital and end with a period.

The patch contains a number of white space issues, could you go through and remove all instances of trailing white space, space before tab etc.

Please use consistent layout in the assembler files, for example:

+++ src-patch/ld/testsuite/ld-aarch64/gc-plt2.s 2013-04-09 10:55:49.979419681 +0530
@@ -0,0 +1,12 @@

+        .align  2

TAB before .text

+++ src-patch/ld/testsuite/ld-aarch64/gc-relocs-257.s 2013-04-09 10:55:49.979419681 +0530
@@ -0,0 +1,8 @@
+.word   tempy
+.xword  tempy2
+.hword  tempy3
+.hword  tempy3+8

TAB before directives.

+        and     x0,x0,x0

Space after comma.


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