Re: [PATCH] arm: allow SIMD instructions to be used without VFP support enabled

["Jan Beulich" <JBeulich at suse dot com>]

>>> On 08.04.13 at 18:31, Richard Earnshaw <rearnsha@arm.com> wrote:
> The class of common mnemonics you've changed includes instructions such 
> as vmul.  When you have Neon but no FP, both the scalar FP and vector FP 
> variants of the instructions should be disabled, but the integer 
> versions remain.

By example of vabs I already know that this isn't the case -
vabs.f32 (with Dn or Qn register operands) continues to assemble
quite fine.

The fundamental question here is what the meaning of

	.arch_extension "fp"

and its "nofp" counterpart really is: The current meaning is to
enable/disable VFP, not floating point support in general. And
again, according to my reading of the spec you'd need a
separate enable/disable for SIMD-without-FP first in order to
achieve the effect you appear to aim at (iow to me "no VFP"
does not imply integer only SIMD, no matter whether in actual
implementations this will likely be the case, as there's no
dependency mentioned in the FPSID and MVFRx registers).

> This needs some testing to ensure that the right things are 
> disabled/enabled accordingly.

I agree that testing this is desirable, namely to prevent future
changes to silently enable this again. But without first
understanding what the intended behavior is, I don't see how
I could create valid tests (and, if necessary, also further adjust
the patch).

Jan