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Re: [PATCH,IA64] Fix bug in double slot instruction reloc
- From: Jim Wilson <jimwilso at cisco dot com>
- To: Douglas B Rupp <rupp at gnat dot com>
- Cc: binutils <binutils at sourceware dot org>
- Date: Wed, 06 Mar 2013 15:00:29 -0800
- Subject: Re: [PATCH,IA64] Fix bug in double slot instruction reloc
- References: <51268E6D.firstname.lastname@example.org>
On 02/21/2013 01:15 PM, Douglas B Rupp wrote:
Please find attached my proposed fix to a bug which shows up on ia64 vms
with the "brl" instruction. It needs both approval and commit.
I unfortunately don't have a working ia64-linux machine at the moment so
I can't easily test this with a build. I looked at bfd sources though,
as I was wondering how this would affect ld. It appears that when we
have a 60- or 64-bit relocation type we never look at the slot number,
so it doesn't matter whether this is 1 or 2. Furthermore, in the code
that relaxes br to brl and vice versa, it assumes that the slot number
for brl is 1. So for linux the patch appears to be harmless, and is
fixing a minor inconsistency between gas and bfd.
I also looked at the Itanium ABI, and didn't see any clear indication of
whether relocs for a long instruction should be marked as slot 1 or slot
2. So it appears that we can use whatever is convenient which appears
to be 1 since VMS requires that.
The patch looks OK to me.
A small testcase for the gas testsuite might be useful to ensure that
the slot number remains 1.