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RE: [RL78] Fix encoding of divwu insn


Hi Nick,
Thanks for the quick review and approving most of this patch.

> please could you add a comment mentioning the change of opcode
Added comment in parse.y

> better to leave the "case 0x04:" statements in place - but maybe have them
> decode to "divwu <old-encoding>"
Done, added new encoding below case '0x06' so it would be sequential.

If these changes are OK, could you please check in this patch for me as I
do not have write access here.

Best Regards,
Kaushik Phatak

	gas/Changelog
	* rl78-parse.y: Fix encoding of divwu insn.
	opcodes/Changelog
	* rl78-decode.c: Fix encoding of divwu insn.
	* rl78-decode.opc: Ditto.
	
--- ./orig/gas/config/rl78-parse.y	2013-02-25 21:49:57.000000000 +0530
+++ ./new/gas/config/rl78-parse.y	2013-02-25 22:11:49.000000000 +0530
@@ -513,8 +513,12 @@ statement :
 	| DIVHU
 	  { B3 (0xce, 0xfb, 0x03); }
 
+/* Note that the DIVWU encoding was changed from [0xce,0xfb,0x04] to
+   [0xce,0xfb,0x0b]. Different versions of the Software Manual exist
+   with the same version number. Updated to the latest available release.  */
+
 	| DIVWU
-	  { B3 (0xce, 0xfb, 0x04); }
+	  { B3 (0xce, 0xfb, 0x0b); }
 
 	| MACHU
 	  { B3 (0xce, 0xfb, 0x05); }
--- ./orig/opcodes/rl78-decode.c	2013-02-25 21:50:24.000000000 +0530
+++ ./new/opcodes/rl78-decode.c	2013-02-25 21:33:33.000000000 +0530
@@ -5146,7 +5146,7 @@ rl78_decode_opcode (unsigned long pc AU,
         	rl78->syntax = "divhu"; ID(divhu);
         	break;
               case 0x04:
-        	rl78->syntax = "divwu"; ID(divwu);
+        	rl78->syntax = "divwu <old-encoding>"; ID(divwu);
         	break;
               case 0x05:
         	rl78->syntax = "machu"; ID(machu);
@@ -5154,6 +5154,9 @@ rl78_decode_opcode (unsigned long pc AU,
               case 0x06:
         	rl78->syntax = "mach"; ID(mach);
         	break;
+              case 0x0b:
+        	rl78->syntax = "divwu"; ID(divwu);
+        	break;
               }
         
         }
--- ./orig/opcodes/rl78-decode.opc	2013-02-25 21:50:40.000000000 +0530
+++ ./new/opcodes/rl78-decode.opc	2013-02-25 21:34:58.000000000 +0530
@@ -741,7 +741,7 @@ rl78_decode_opcode (unsigned long pc AU,
 	rl78->syntax = "divhu"; ID(divhu);
 	break;
       case 0x04:
-	rl78->syntax = "divwu"; ID(divwu);
+	rl78->syntax = "divwu <old-encoding>" ID(divwu);
 	break;
       case 0x05:
 	rl78->syntax = "machu"; ID(machu);
@@ -749,6 +749,9 @@ rl78_decode_opcode (unsigned long pc AU,
       case 0x06:
 	rl78->syntax = "mach"; ID(mach);
 	break;
+      case 0x0b:
+	rl78->syntax = "divwu"; ID(divwu);
+	break;
       }
 
 /** 1001 1110			mov	%0, %1				*/



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