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m68hc11 - bug found with MOVW oprx16_xysp, oprx16_xysp1
- From: James Murray <jsm at jsm-net dot demon dot co dot uk>
- To: binutils at sourceware dot org
- Cc: Stephane dot Carrez at gmail dot com, skeys at ipdatasys dot com
- Date: Wed, 07 Nov 2012 00:18:39 +0000
- Subject: m68hc11 - bug found with MOVW oprx16_xysp, oprx16_xysp1
Moves using 16bit indexed addressing generate incorrect code when using
an address known only at link time. This appears to be related to the
Note that the gcc typically used for m68hc11/12/9s12x does not emit such
instructions. I've only tripped it with hand coded assembler.
$ cat test.s:
movw gp_max_on,x, gp_clk,y
$ m68hc11-elf-objdump -d -m m9s12x -r test.o
0: 18 02 e2 00 movw 0x0,X, 0x0,Y
4: 00 ea 00 00
The relocates are at the wrong offsets - should be 3 and 6. It then
produces scrambled code when linking.
I believe it to be caused by this section of code in
if ((mode & M6812_OP_IDX) && (current_architecture & cpu9s12x))
/* Must treat as a 16bit relocate as size of final result is
byte <<= 3;
byte |= 0xe2;
number_to_chars_bigendian (f, byte, 1);
fix_new (frag_now, f - frag_now->fr_literal, 2,
sym, off, 0, BFD_RELOC_M68HC12_16B);
f = frag_more (2);
I'll look into it some more when I get chance.