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Re: [RFA] PowerPC VLE port - opcodes update
- From: Alan Modra <amodra at gmail dot com>
- To: "Maciej W. Rozycki" <macro at codesourcery dot com>
- Cc: Peter Bergner <bergner at vnet dot ibm dot com>, James Lemke <jwlemke at codesourcery dot com>, binutils at sourceware dot org, Catherine Moore <clm at codesourcery dot com>
- Date: Sun, 2 Sep 2012 14:07:05 +0930
- Subject: Re: [RFA] PowerPC VLE port - opcodes update
- References: <500EC1E0.email@example.com> <firstname.lastname@example.org> <alpine.DEB.email@example.com>
On Fri, Aug 31, 2012 at 11:52:53AM +0100, Maciej W. Rozycki wrote:
> The logic to interpret the PPCVLE
> (PPC_OPCODE_VLE) flag should IMHO be changed such that in the VLE mode
> (-mvle) it does not enable any instruction such marked unconditionally.
> So for example EVADDW would only be enabled whevener -mvle and -mspe are
> used both at the same time, likewise VADDUBS would only work with -mvle
> and -maltivec and with a lone -mvle neither of these instructions would be
> enabled. The disassembler would work accordingly -- choosing the right
> instruction to dump based on the architecture selected or inferred from
> ELF object flags and the VLE section attribute.
Yes, and of course you can use other -m<cpu>/-M<cpu> options to select
the underlying flags.
Australia Development Lab, IBM