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Re: [PATCH] x86/Intel: relax requirements for memory operands
>>> On 30.07.12 at 17:59, "H.J. Lu" <firstname.lastname@example.org> wrote:
> On Tue, Jul 24, 2012 at 7:48 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> MASM accepts ESP/RSP being specified second in a memory address
>> operand, by silently making it the base register despite not being
>> specified first.
>> Consequently, we also permit an xmm/ymm index to be specified first
>> (possibly alone), nevertheless putting it in as index register.
>> 2012-07-24 Jan Beulich <email@example.com>
>> * config/tc-i386-intel.c (i386_intel_simplify_register): Handle
>> xmm/ymm index register being specified first as well as esp/rsp
>> base register being specified last in a memory operand.
> This caused:
> FAIL: i386 inval-equ-2
> on Linux/x86.
No for me, neither on 32- nor on 64-bit host. I also don't see
how it could - the test case doesn't use Intel syntax, so is
entirely unaffected by this change. Consequently I have no
way of fixing this. Please double check that the failure is really
caused by this change.