Index: ld/NEWS
===================================================================
RCS file: /cvs/src/src/ld/NEWS,v
retrieving revision 1.126
diff -u -p -r1.126 NEWS
--- ld/NEWS	3 May 2012 13:12:04 -0000	1.126
+++ ld/NEWS	8 May 2012 15:02:11 -0000
@@ -2,6 +2,8 @@
 
 * Add support for the Freescale XGATE architecture.
 
+* Add support for the VLE extension to the PowerPC architecture.
+
 * Add option -f FILE on AIX (for response file).
 
 * Add support for the Renesas RL78 architecture.
Index: ld/ldlang.c
===================================================================
RCS file: /cvs/src/src/ld/ldlang.c,v
retrieving revision 1.389
diff -u -p -r1.389 ldlang.c
--- ld/ldlang.c	24 Apr 2012 05:12:40 -0000	1.389
+++ ld/ldlang.c	8 May 2012 15:02:11 -0000
@@ -236,9 +236,6 @@ walk_wild_consider_section (lang_wild_st
 {
   struct name_list *list_tmp;
 
-  /* Propagate the section_flag_info from the wild statement to the section.  */
-  s->section_flag_info = ptr->section_flag_list;
-
   /* Don't process sections from files which were excluded.  */
   for (list_tmp = sec->spec.exclude_name_list;
        list_tmp;
@@ -265,7 +262,7 @@ walk_wild_consider_section (lang_wild_st
 	return;
     }
 
-  (*callback) (ptr, sec, s, file, data);
+  (*callback) (ptr, sec, s, ptr->section_flag_list, file, data);
 }
 
 /* Lowest common denominator routine that can handle everything correctly,
@@ -284,7 +281,7 @@ walk_wild_section_general (lang_wild_sta
     {
       sec = ptr->section_list;
       if (sec == NULL)
-	(*callback) (ptr, sec, s, file, data);
+	(*callback) (ptr, sec, s, ptr->section_flag_list, file, data);
 
       while (sec != NULL)
 	{
@@ -506,6 +503,7 @@ static void
 output_section_callback_fast (lang_wild_statement_type *ptr,
 			      struct wildcard_list *sec,
 			      asection *section,
+			      struct flag_info *sflag_list ATTRIBUTE_UNUSED,
 			      lang_input_statement_type *file,
 			      void *output)
 {
@@ -538,7 +536,7 @@ output_section_callback_tree_to_list (la
   if (tree->left)
     output_section_callback_tree_to_list (ptr, tree->left, output);
 
-  lang_add_section (&ptr->children, tree->section,
+  lang_add_section (&ptr->children, tree->section, NULL,
 		    (lang_output_section_statement_type *) output);
 
   if (tree->right)
@@ -1809,7 +1807,7 @@ lang_insert_orphan (asection *s,
 
   if (add_child == NULL)
     add_child = &os->children;
-  lang_add_section (add_child, s, os);
+  lang_add_section (add_child, s, NULL, os);
 
   if (after && (s->flags & (SEC_LOAD | SEC_ALLOC)) != 0)
     {
@@ -2227,16 +2225,15 @@ section_already_linked (bfd *abfd, asect
    foo.o(.text, .data).  */
 
 /* Add SECTION to the output section OUTPUT.  Do this by creating a
-   lang_input_section statement which is placed at PTR.  FILE is the
-   input file which holds SECTION.  */
+   lang_input_section statement which is placed at PTR.  */
 
 void
 lang_add_section (lang_statement_list_type *ptr,
 		  asection *section,
+		  struct flag_info *sflag_info,
 		  lang_output_section_statement_type *output)
 {
   flagword flags = section->flags;
-  struct flag_info *sflag_info = section->section_flag_info;
 
   bfd_boolean discard;
   lang_input_section_type *new_section;
@@ -2268,24 +2265,11 @@ lang_add_section (lang_statement_list_ty
 
   if (sflag_info)
     {
-      if (sflag_info->flags_initialized == FALSE)
-	bfd_lookup_section_flags (&link_info, sflag_info);
-
-      if (sflag_info->only_with_flags != 0
-	  && sflag_info->not_with_flags != 0
-          && ((sflag_info->not_with_flags & flags) != 0
-	       || (sflag_info->only_with_flags & flags)
-                   != sflag_info->only_with_flags))
-	return;
+      bfd_boolean keep;
 
-      if (sflag_info->only_with_flags != 0
-	  && (sflag_info->only_with_flags & flags)
-              != sflag_info->only_with_flags)
-	return;
-
-      if (sflag_info->not_with_flags != 0
-          && (sflag_info->not_with_flags & flags) != 0)
-	return;
+      keep = bfd_lookup_section_flags (&link_info, sflag_info, section);
+      if (!keep)
+        return;
     }
 
   if (section->output_section != NULL)
@@ -2498,6 +2482,7 @@ static void
 output_section_callback (lang_wild_statement_type *ptr,
 			 struct wildcard_list *sec,
 			 asection *section,
+			 struct flag_info *sflag_info,
 			 lang_input_statement_type *file,
 			 void *output)
 {
@@ -2518,14 +2503,14 @@ output_section_callback (lang_wild_state
      of the current list.  */
 
   if (before == NULL)
-    lang_add_section (&ptr->children, section, os);
+    lang_add_section (&ptr->children, section, sflag_info, os);
   else
     {
       lang_statement_list_type list;
       lang_statement_union_type **pp;
 
       lang_list_init (&list);
-      lang_add_section (&list, section, os);
+      lang_add_section (&list, section, sflag_info, os);
 
       /* If we are discarding the section, LIST.HEAD will
 	 be NULL.  */
@@ -2551,6 +2536,7 @@ static void
 check_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED,
 			struct wildcard_list *sec ATTRIBUTE_UNUSED,
 			asection *section,
+			struct flag_info *sflag_info ATTRIBUTE_UNUSED,
 			lang_input_statement_type *file ATTRIBUTE_UNUSED,
 			void *output)
 {
@@ -6010,7 +5996,7 @@ lang_place_orphans (void)
 			  = lang_output_section_statement_lookup (".bss", 0,
 								  TRUE);
 		      lang_add_section (&default_common_section->children, s,
-					default_common_section);
+					NULL, default_common_section);
 		    }
 		}
 	      else
@@ -6032,7 +6018,7 @@ lang_place_orphans (void)
 			  && (link_info.relocatable
 			      || (s->flags & (SEC_LOAD | SEC_ALLOC)) == 0))
 			os->addr_tree = exp_intop (0);
-		      lang_add_section (&os->children, s, os);
+		      lang_add_section (&os->children, s, NULL, os);
 		    }
 		}
 	    }
@@ -6253,6 +6239,7 @@ static void
 gc_section_callback (lang_wild_statement_type *ptr,
 		     struct wildcard_list *sec ATTRIBUTE_UNUSED,
 		     asection *section,
+		     struct flag_info *sflag_info ATTRIBUTE_UNUSED,
 		     lang_input_statement_type *file ATTRIBUTE_UNUSED,
 		     void *data ATTRIBUTE_UNUSED)
 {
@@ -6324,6 +6311,7 @@ static void
 find_relro_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED,
 			     struct wildcard_list *sec ATTRIBUTE_UNUSED,
 			     asection *section,
+			     struct flag_info *sflag_info ATTRIBUTE_UNUSED,
 			     lang_input_statement_type *file ATTRIBUTE_UNUSED,
 			     void *data)
 {
Index: ld/ldlang.h
===================================================================
RCS file: /cvs/src/src/ld/ldlang.h,v
retrieving revision 1.103
diff -u -p -r1.103 ldlang.h
--- ld/ldlang.h	8 Mar 2012 05:29:33 -0000	1.103
+++ ld/ldlang.h	8 May 2012 15:02:11 -0000
@@ -314,7 +314,8 @@ typedef struct
 typedef struct lang_wild_statement_struct lang_wild_statement_type;
 
 typedef void (*callback_t) (lang_wild_statement_type *, struct wildcard_list *,
-			    asection *, lang_input_statement_type *, void *);
+			    asection *, struct flag_info *,
+			    lang_input_statement_type *, void *);
 
 typedef void (*walk_wild_section_handler_t) (lang_wild_statement_type *,
 					     lang_input_statement_type *,
@@ -616,7 +617,7 @@ extern void lang_leave_group
   (void);
 extern void lang_add_section
   (lang_statement_list_type *, asection *,
-   lang_output_section_statement_type *);
+   struct flag_info *, lang_output_section_statement_type *);
 extern void lang_new_phdr
   (const char *, etree_type *, bfd_boolean, bfd_boolean, etree_type *,
    etree_type *);
Index: ld/emultempl/armelf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/armelf.em,v
retrieving revision 1.85
diff -u -p -r1.85 armelf.em
--- ld/emultempl/armelf.em	24 Apr 2012 05:12:40 -0000	1.85
+++ ld/emultempl/armelf.em	8 May 2012 15:02:11 -0000
@@ -208,7 +208,7 @@ elf32_arm_add_stub_section (const char *
 
   info.input_section = input_section;
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
 
   if (info.add.head == NULL)
     goto err_ret;
Index: ld/emultempl/beos.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/beos.em,v
retrieving revision 1.48
diff -u -p -r1.48 beos.em
--- ld/emultempl/beos.em	28 Feb 2011 18:34:52 -0000	1.48
+++ ld/emultempl/beos.em	8 May 2012 15:02:11 -0000
@@ -718,7 +718,7 @@ gld${EMULATION_NAME}_place_orphan (asect
      The sections still have to be sorted, but that has to wait until
      all such sections have been processed by us.  The sorting is done by
      sort_sections.  */
-  lang_add_section (&l->wild_statement.children, s, os);
+  lang_add_section (&l->wild_statement.children, s, NULL, os);
 
   return os;
 }
Index: ld/emultempl/elf32.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/elf32.em,v
retrieving revision 1.225
diff -u -p -r1.225 elf32.em
--- ld/emultempl/elf32.em	5 Mar 2012 22:43:40 -0000	1.225
+++ ld/emultempl/elf32.em	8 May 2012 15:02:11 -0000
@@ -1861,7 +1861,7 @@ gld${EMULATION_NAME}_place_orphan (asect
 	       If the section already exists but does not have any flags
 	       set, then it has been created by the linker, probably as a
 	       result of a --section-start command line switch.  */
-	    lang_add_section (&os->children, s, os);
+	    lang_add_section (&os->children, s, NULL, os);
 	    return os;
 	  }
 
@@ -1875,7 +1875,7 @@ gld${EMULATION_NAME}_place_orphan (asect
      unused one and use that.  */
   if (match_by_name)
     {
-      lang_add_section (&match_by_name->children, s, match_by_name);
+      lang_add_section (&match_by_name->children, s, NULL, match_by_name);
       return match_by_name;
     }
 
@@ -1901,7 +1901,7 @@ gld${EMULATION_NAME}_place_orphan (asect
       && hold[orphan_text].os != NULL)
     {
       os = hold[orphan_text].os;
-      lang_add_section (&os->children, s, os);
+      lang_add_section (&os->children, s, NULL, os);
       return os;
     }
 
Index: ld/emultempl/hppaelf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/hppaelf.em,v
retrieving revision 1.58
diff -u -p -r1.58 hppaelf.em
--- ld/emultempl/hppaelf.em	24 Apr 2012 05:12:40 -0000	1.58
+++ ld/emultempl/hppaelf.em	8 May 2012 15:02:11 -0000
@@ -195,7 +195,7 @@ hppaelf_add_stub_section (const char *st
 
   info.input_section = input_section;
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
 
   if (info.add.head == NULL)
     goto err_ret;
Index: ld/emultempl/m68hc1xelf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/m68hc1xelf.em,v
retrieving revision 1.14
diff -u -p -r1.14 m68hc1xelf.em
--- ld/emultempl/m68hc1xelf.em	2 Sep 2009 07:25:35 -0000	1.14
+++ ld/emultempl/m68hc1xelf.em	8 May 2012 15:02:11 -0000
@@ -271,7 +271,7 @@ m68hc11elf_add_stub_section (const char 
      at the correct place.  */
   info.input_section = tramp_section;
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
 
   if (info.add.head == NULL)
     goto err_ret;
Index: ld/emultempl/mipself.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/mipself.em,v
retrieving revision 1.13
diff -u -p -r1.13 mipself.em
--- ld/emultempl/mipself.em	9 Jun 2011 10:36:19 -0000	1.13
+++ ld/emultempl/mipself.em	8 May 2012 15:02:11 -0000
@@ -180,7 +180,7 @@ mips_add_stub_section (const char *stub_
 
   /* Initialize a statement list that contains only the new statement.  */
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
   if (info.add.head == NULL)
     goto err_ret;
 
Index: ld/emultempl/mmo.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/mmo.em,v
retrieving revision 1.27
diff -u -p -r1.27 mmo.em
--- ld/emultempl/mmo.em	20 Dec 2010 13:00:14 -0000	1.27
+++ ld/emultempl/mmo.em	8 May 2012 15:02:11 -0000
@@ -75,7 +75,7 @@ mmo_place_orphan (asection *s,
      (regardless of whether the linker script lists it as input).  */
   if (os != NULL)
     {
-      lang_add_section (&os->children, s, os);
+      lang_add_section (&os->children, s, NULL, os);
       return os;
     }
 
Index: ld/emultempl/pe.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/pe.em,v
retrieving revision 1.172
diff -u -p -r1.172 pe.em
--- ld/emultempl/pe.em	5 Mar 2012 22:43:40 -0000	1.172
+++ ld/emultempl/pe.em	8 May 2012 15:02:11 -0000
@@ -1915,7 +1915,7 @@ gld_${EMULATION_NAME}_place_orphan (asec
 	       If the section already exists but does not have any flags set,
 	       then it has been created by the linker, probably as a result of
 	       a --section-start command line switch.  */
-	    lang_add_section (&add_child, s, os);
+	    lang_add_section (&add_child, s, NULL, os);
 	    break;
 	  }
 
@@ -1929,7 +1929,7 @@ gld_${EMULATION_NAME}_place_orphan (asec
      unused one and use that.  */
   if (os == NULL && match_by_name)
     {
-      lang_add_section (&match_by_name->children, s, match_by_name);
+      lang_add_section (&match_by_name->children, s, NULL, match_by_name);
       return match_by_name;
     }
 
Index: ld/emultempl/pep.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/pep.em,v
retrieving revision 1.47
diff -u -p -r1.47 pep.em
--- ld/emultempl/pep.em	5 Mar 2012 22:43:40 -0000	1.47
+++ ld/emultempl/pep.em	8 May 2012 15:02:12 -0000
@@ -1651,7 +1651,7 @@ gld_${EMULATION_NAME}_place_orphan (asec
 	       If the section already exists but does not have any flags set,
 	       then it has been created by the linker, probably as a result of
 	       a --section-start command line switch.  */
-	    lang_add_section (&add_child, s, os);
+	    lang_add_section (&add_child, s, NULL, os);
 	    break;
 	  }
 
@@ -1665,7 +1665,7 @@ gld_${EMULATION_NAME}_place_orphan (asec
      unused one and use that.  */
   if (os == NULL && match_by_name)
     {
-      lang_add_section (&match_by_name->children, s, match_by_name);
+      lang_add_section (&match_by_name->children, s, NULL, match_by_name);
       return match_by_name;
     }
 
Index: ld/emultempl/ppc64elf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/ppc64elf.em,v
retrieving revision 1.82
diff -u -p -r1.82 ppc64elf.em
--- ld/emultempl/ppc64elf.em	24 Apr 2012 05:12:40 -0000	1.82
+++ ld/emultempl/ppc64elf.em	8 May 2012 15:02:12 -0000
@@ -395,7 +395,7 @@ ppc_add_stub_section (const char *stub_s
 
   info.input_section = input_section;
   lang_list_init (&info.add);
-  lang_add_section (&info.add, stub_sec, os);
+  lang_add_section (&info.add, stub_sec, NULL, os);
 
   if (info.add.head == NULL)
     goto err_ret;
Index: ld/emultempl/spuelf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/spuelf.em,v
retrieving revision 1.45
diff -u -p -r1.45 spuelf.em
--- ld/emultempl/spuelf.em	5 Mar 2012 22:43:40 -0000	1.45
+++ ld/emultempl/spuelf.em	8 May 2012 15:02:12 -0000
@@ -151,7 +151,7 @@ spu_place_special_section (asection *s, 
       lang_statement_list_type add;
 
       lang_list_init (&add);
-      lang_add_section (&add, s, os);
+      lang_add_section (&add, s, NULL, os);
       *add.tail = os->children.head;
       os->children.head = add.head;
     }
@@ -168,7 +168,7 @@ spu_place_special_section (asection *s, 
 	  lang_add_assignment (exp_assign (".", e_size));
 	  pop_stat_ptr ();
 	}
-      lang_add_section (&os->children, s, os);
+      lang_add_section (&os->children, s, NULL, os);
     }
 
   s->output_section->size += s->size;
Index: ld/emultempl/vms.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/vms.em,v
retrieving revision 1.6
diff -u -p -r1.6 vms.em
--- ld/emultempl/vms.em	12 Apr 2012 07:35:06 -0000	1.6
+++ ld/emultempl/vms.em	8 May 2012 15:02:12 -0000
@@ -117,7 +117,7 @@ vms_place_orphan (asection *s,
 
   if (hold_data.os != NULL)
     {
-      lang_add_section (&hold_data.os->children, s, hold_data.os);
+      lang_add_section (&hold_data.os->children, s, NULL, hold_data.os);
       return hold_data.os;
     }
   else
Index: ld/testsuite/ld-powerpc/apuinfo.rd
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/apuinfo.rd,v
retrieving revision 1.4
diff -u -p -r1.4 apuinfo.rd
--- ld/testsuite/ld-powerpc/apuinfo.rd	8 Feb 2010 07:09:39 -0000	1.4
+++ ld/testsuite/ld-powerpc/apuinfo.rd	8 May 2012 15:02:12 -0000
@@ -6,6 +6,7 @@
 #target: powerpc-eabi*
 
 Hex dump of section '.PPC.EMB.apuinfo':
-  0x00000000 00000008 0000001c 00000002 41505569 ............APUi
+  0x00000000 00000008 00000020 00000002 41505569 ....... ....APUi
   0x00000010 6e666f00 00420001 00430001 00410001 nfo..B...C...A..
-  0x00000020 01020001 01010001 00400001 01000001 .........@......
+  0x00000020 01020001 01010001 00400001 01040001 .........@......
+  0x00000030 01000001                            ....$
Index: ld/testsuite/ld-powerpc/powerpc.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/powerpc.exp,v
retrieving revision 1.38
diff -u -p -r1.38 powerpc.exp
--- ld/testsuite/ld-powerpc/powerpc.exp	8 Nov 2011 13:06:03 -0000	1.38
+++ ld/testsuite/ld-powerpc/powerpc.exp	8 May 2012 15:02:12 -0000
@@ -215,6 +215,33 @@ set ppc64elftests {
 	{{objdump -s tocopt5.d}} "tocopt5"}
 }
 
+set ppceabitests {
+    {"VLE multiple segments 1" "-T vle-multiseg-1.ld"
+     "-mregnames -mvle" {vle-multiseg.s}
+    {{readelf "-l" vle-multiseg-1.d}} "vle-multiseg-1"}
+    {"VLE multiple segments 2" "-T vle-multiseg-2.ld"
+     "-mregnames -mvle" {vle-multiseg.s}
+    {{readelf "-l" vle-multiseg-2.d}} "vle-multiseg-2"}
+    {"VLE multiple segments 3" "-T vle-multiseg-3.ld"
+     "-mregnames -mvle" {vle-multiseg.s}
+    {{readelf "-l" vle-multiseg-3.d}} "vle-multiseg-3"}
+    {"VLE multiple segments 4" "-T vle-multiseg-4.ld"
+     "-mregnames -mvle" {vle-multiseg.s}
+    {{readelf "-l" vle-multiseg-4.d}} "vle-multiseg-4"}
+    {"VLE multiple segments 5" "-T vle-multiseg-5.ld"
+     "-mregnames -mvle" {vle-multiseg.s}
+    {{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"}
+    {"VLE relocations 1" ""
+     "-mvle" {vle-reloc-1.s vle-reloc-def-1.s}
+    {{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"}
+    {"VLE relocations 2" ""
+     "-mvle" {vle-reloc-2.s vle-reloc-def-2.s}
+    {{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"}
+    {"VLE relocations 3" ""
+     "-mvle" {vle-reloc-3.s vle-reloc-def-3.s}
+    {{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"}
+}
+
 
 run_ld_link_tests $ppcelftests
 
@@ -223,6 +250,10 @@ if [ supports_ppc64 ] then {
     run_dump_test "relbrlt"
 }
 
+if { [istarget "powerpc*-eabi*"] } {
+    run_ld_link_tests $ppceabitests
+}
+
 run_dump_test "plt1"
 
 run_dump_test "attr-gnu-4-00"
@@ -251,3 +282,5 @@ run_dump_test "attr-gnu-8-31"
 
 run_dump_test "attr-gnu-12-11"
 run_dump_test "attr-gnu-12-21"
+
+run_dump_test "vle-multiseg-6"
Index: ld/testsuite/ld-powerpc/vle-multiseg-1.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-1.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-1.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-1.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,14 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 2 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .data 
+   01     .text_vle .text_iv .iv_handlers 
Index: ld/testsuite/ld-powerpc/vle-multiseg-1.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-1.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-1.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-1.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,17 @@
+SECTIONS
+{
+  .data		0x00000400 :
+  { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+  .text_vle	0x00001000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) 
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) 		
+  }
+  .text_iv	. : { . = ALIGN(16); *(.text_iv) }
+  .iv_handlers	0x0001F000 : { *(.iv_handlers) }
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-2.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-2.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-2.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-2.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text_vle 
+   01     .data 
+   02     .text_iv .iv_handlers 
Index: ld/testsuite/ld-powerpc/vle-multiseg-2.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-2.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-2.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-2.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,17 @@
+SECTIONS
+{
+  .text_vle	0x00001000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) 
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) 		
+  }
+  .data		0x00001400 :
+  { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+  .text_iv	. : { . = ALIGN(16); *(.text_iv) }
+  .iv_handlers	0x0001F000 : { *(.iv_handlers) }
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-3.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-3.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-3.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-3.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text_vle .text_iv 
+   01     .data 
+   02     .iv_handlers 
Index: ld/testsuite/ld-powerpc/vle-multiseg-3.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-3.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-3.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-3.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,17 @@
+SECTIONS
+{
+  .text_vle	0x00001000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) 
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) 		
+  }
+  .text_iv	. : { . = ALIGN(16); *(.text_iv) }
+  .data		0x00001400 :
+  { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+  .iv_handlers	0x0001F000 : { *(.iv_handlers) }
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-4.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-4.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-4.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-4.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,14 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 2 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text_vle .text_iv .iv_handlers 
+   01     .data 
Index: ld/testsuite/ld-powerpc/vle-multiseg-4.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-4.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-4.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-4.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,17 @@
+SECTIONS
+{
+  .text_vle	0x00001000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) 
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) 		
+  }
+  .text_iv	. : { . = ALIGN(16); *(.text_iv) }
+  .iv_handlers	0x0001F000 : { *(.iv_handlers) }
+  .data		0x00020400 :
+  { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-5.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-5.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-5.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-5.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text_vle .text_iv 
+   01     .data 
+   02     .iv_handlers 
Index: ld/testsuite/ld-powerpc/vle-multiseg-5.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-5.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-5.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-5.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,44 @@
+
+MEMORY
+{
+        code_rom (rxw)	:	org = 0x00001000, len = 0x1EF000
+        irpt_rom (rx)	:	org = 0x001F0000, len = 0x2000
+        int__ram (rxw)	:	org = 0x40000000, len = 256K
+}
+
+REGION_ALIAS("INTR", irpt_rom)
+REGION_ALIAS("CODE", code_rom)
+REGION_ALIAS("RODATA", code_rom)
+REGION_ALIAS("RAM", int__ram)
+
+SECTIONS
+{
+	.iv_handlers :
+	{
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers)
+	} > INTR
+
+	.text_vle :
+	{ 
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) 
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+		INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) 		
+	} > CODE
+        
+	.rodata :
+	{
+		*(.rodata)
+	} > RODATA
+        
+	.data   :
+	{
+		*(.data)
+		*(.data.*)
+		*(.ctors)
+		*(.dtors)    
+	}  > RAM AT>RODATA
+
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-6.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6.d
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,25 @@
+#source: vle-multiseg-6a.s -mregnames -mvle
+#source: vle-multiseg-6b.s
+#source: vle-multiseg-6c.s
+#source: vle-multiseg-6d.s -mregnames -mvle
+#ld: -T vle-multiseg-6.ld
+#target: powerpc-*-*
+#readelf: -l
+
+Elf file type is EXEC.*
+Entry point 0x[0-9a-f]+
+There are 4 program headers, starting at offset [0-9]+
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .data 
+   01     .text_vle 
+   02     .text_iv 
+   03     .text 
Index: ld/testsuite/ld-powerpc/vle-multiseg-6.ld
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6.ld
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6.ld
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6.ld	8 May 2012 15:02:12 -0000
@@ -0,0 +1,37 @@
+MEMORY
+{
+	vle_seg1 (rxw):     	org = 0x00000000, len = 0x10000
+	vle_seg2 (rxw):     	org = 0x00100000, len = 0x10000
+        nonvle_seg (rxw):	org = 0x001F0000, len = 0x20000
+}
+SECTIONS
+{
+  .data		0x00000100 :
+  {
+	*(.data)
+	*(.ctors)
+	*(.dtors)
+	*(.eh_frame)
+	*(.jcr)
+  }
+  .text_vle	0x00001000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text*)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init*)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini*)
+  }  > vle_seg1
+
+  .text_iv	0x100000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_iv)
+	INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers)
+  } >vle_seg2
+
+  .text 	0x101000 :
+  {
+	. = ALIGN(16);
+	INPUT_SECTION_FLAGS (!SHF_PPC_VLE) *(.text*)
+  }
+}
Index: ld/testsuite/ld-powerpc/vle-multiseg-6a.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6a.s
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6a.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6a.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,47 @@
+	.text
+
+	e_stw    r12, 0x4C(r1)
+	e_stw    r11, 0x48(r1)
+	e_stw    r10, 0x44(r1)
+	e_stw    r9,  0x40(r1)
+	e_stw    r8,  0x3C(r1)
+	e_stw    r7,  0x38(r1)
+	e_stw    r6,  0x34(r1)
+	e_stw    r5,  0x30(r1)
+	e_stw    r4,  0x2c(r1)
+
+        .globl   IV_table
+	.section ".iv_handlers", "ax"
+IV_table:
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+dummy:
+	se_nop
+	e_b dummy
+
+	.section ".text_iv", "ax"
+	e_lis r3, IV_table@h
+	mtivpr r3
+	e_li r3, IV_table@l+0x00
+	mtivor0 r3
+	e_li r3, IV_table@l+0x10
+	mtivor1 r3
+	e_li r3, IV_table@l+0x20
+	mtivor2 r3
+
+	.data
+	.long 0xdeadbeef
Index: ld/testsuite/ld-powerpc/vle-multiseg-6b.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6b.s
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6b.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6b.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,6 @@
+	.text
+
+        and.    3,4,5
+        and     3,4,5
+        andc    13,14,15
+        andc.   16,17,18
Index: ld/testsuite/ld-powerpc/vle-multiseg-6c.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6c.s
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6c.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6c.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,6 @@
+	.text
+
+        and.    3,4,5
+        and     3,4,5
+        andc    13,14,15
+        andc.   16,17,18
Index: ld/testsuite/ld-powerpc/vle-multiseg-6d.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg-6d.s
diff -N ld/testsuite/ld-powerpc/vle-multiseg-6d.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg-6d.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,9 @@
+	.section ".text_iv", "ax"
+	e_lis r3, IV_table@h
+	mtivpr r3
+	e_li r3, IV_table@l+0x00
+	mtivor0 r3
+	e_li r3, IV_table@l+0x10
+	mtivor1 r3
+	e_li r3, IV_table@l+0x20
+	mtivor2 r3
Index: ld/testsuite/ld-powerpc/vle-multiseg.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-multiseg.s
diff -N ld/testsuite/ld-powerpc/vle-multiseg.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-multiseg.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,50 @@
+# Make up several VLE text sections which the linker script will put into
+# separate output sections.  We will then check for separate load segments.
+#	.include "mpc5500_usrdefs.inc"
+#	.section ".text_vle"
+
+	e_stw    r12, 0x4C(r1)
+	e_stw    r11, 0x48(r1)
+	e_stw    r10, 0x44(r1)
+	e_stw    r9,  0x40(r1)
+	e_stw    r8,  0x3C(r1)
+	e_stw    r7,  0x38(r1)
+	e_stw    r6,  0x34(r1)
+	e_stw    r5,  0x30(r1)
+	e_stw    r4,  0x2c(r1)
+
+        .globl   IV_table
+	.section ".iv_handlers", "ax"
+IV_table:
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+	e_b dummy
+	.align 4
+dummy:
+	se_nop
+	e_b dummy
+
+	.section ".text_iv", "ax"
+	e_lis r3, IV_table@h
+	mtivpr r3
+	e_li r3, IV_table@l+0x00
+	mtivor0 r3
+	e_li r3, IV_table@l+0x10
+	mtivor1 r3
+	e_li r3, IV_table@l+0x20
+	mtivor2 r3
+
+	.data
+	.long 0xdeadbeef
Index: ld/testsuite/ld-powerpc/vle-reloc-1.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-1.d
diff -N ld/testsuite/ld-powerpc/vle-reloc-1.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-1.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,29 @@
+.*:     file format .*
+
+
+Disassembly of section .text:
+
+01800054 <sub1>:
+ 1800054:	00 04       	se_blr
+
+01800056 <sub2>:
+ 1800056:	00 04       	se_blr
+
+01800058 <vle_reloc>:
+ 1800058:	e8 fe       	se_b    1800054 <sub1>
+ 180005a:	e9 fd       	se_bl   1800054 <sub1>
+ 180005c:	e1 fd       	se_ble  1800056 <sub2>
+ 180005e:	e6 fc       	se_beq  1800056 <sub2>
+ 1800060:	78 00 00 10 	e_b     1800070 <sub3>
+ 1800064:	78 00 00 0f 	e_bl    1800072 <sub4>
+ 1800068:	7a 05 00 0c 	e_ble   cr1,1800074 <sub5>
+ 180006c:	7a 1a 00 09 	e_beql  cr2,1800074 <sub5>
+
+01800070 <sub3>:
+ 1800070:	00 04       	se_blr
+
+01800072 <sub4>:
+ 1800072:	00 04       	se_blr
+
+01800074 <sub5>:
+ 1800074:	00 04       	se_blr
Index: ld/testsuite/ld-powerpc/vle-reloc-1.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-1.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-1.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-1.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,18 @@
+        .section .text
+sub1:
+        se_blr
+
+sub2:
+        se_blr
+
+	.section .text
+vle_reloc:
+	se_b	sub1
+	se_bl	sub1
+	se_bc	0,1,sub2
+	se_bc	1,2,sub2
+
+	e_b	sub3
+	e_bl	sub4
+	e_bc	0,5,sub5
+	e_bcl	1,10,sub5
Index: ld/testsuite/ld-powerpc/vle-reloc-2.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-2.d
diff -N ld/testsuite/ld-powerpc/vle-reloc-2.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-2.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,87 @@
+.*:     file format .*
+
+Disassembly of section .text:
+
+01800094 <sub1>:
+ 1800094:	00 04       	se_blr
+01800096 <sub2>:
+ 1800096:	00 04       	se_blr
+01800098 <vle_reloc_2>:
+ 1800098:	70 20 c1 c2 	e_or2i  r1,450
+ 180009c:	70 40 c1 81 	e_or2i  r2,385
+ 18000a0:	70 60 c1 81 	e_or2i  r3,385
+ 18000a4:	70 80 c1 ce 	e_or2i  r4,462
+ 18000a8:	70 a0 c1 80 	e_or2i  r5,384
+ 18000ac:	70 40 c1 81 	e_or2i  r2,385
+ 18000b0:	70 20 c9 c2 	e_and2i. r1,450
+ 18000b4:	70 40 c9 81 	e_and2i. r2,385
+ 18000b8:	70 60 c9 81 	e_and2i. r3,385
+ 18000bc:	70 80 c9 ce 	e_and2i. r4,462
+ 18000c0:	70 a0 c9 80 	e_and2i. r5,384
+ 18000c4:	70 40 c9 81 	e_and2i. r2,385
+ 18000c8:	70 20 d1 c2 	e_or2is r1,450
+ 18000cc:	70 40 d1 81 	e_or2is r2,385
+ 18000d0:	70 60 d1 81 	e_or2is r3,385
+ 18000d4:	70 80 d1 ce 	e_or2is r4,462
+ 18000d8:	70 a0 d1 80 	e_or2is r5,384
+ 18000dc:	70 40 d1 81 	e_or2is r2,385
+ 18000e0:	70 20 e1 c2 	e_lis   r1,450
+ 18000e4:	70 40 e1 81 	e_lis   r2,385
+ 18000e8:	70 60 e1 81 	e_lis   r3,385
+ 18000ec:	70 80 e1 ce 	e_lis   r4,462
+ 18000f0:	70 a0 e1 80 	e_lis   r5,384
+ 18000f4:	70 40 e1 81 	e_lis   r2,385
+ 18000f8:	70 20 e9 c2 	e_and2is. r1,450
+ 18000fc:	70 40 e9 81 	e_and2is. r2,385
+ 1800100:	70 60 e9 81 	e_and2is. r3,385
+ 1800104:	70 80 e9 ce 	e_and2is. r4,462
+ 1800108:	70 a0 e9 80 	e_and2is. r5,384
+ 180010c:	70 40 e9 81 	e_and2is. r2,385
+ 1800110:	70 01 99 c2 	e_cmp16i r1,450
+ 1800114:	70 02 99 81 	e_cmp16i r2,385
+ 1800118:	70 03 99 81 	e_cmp16i r3,385
+ 180011c:	70 04 99 ce 	e_cmp16i r4,462
+ 1800120:	70 05 99 80 	e_cmp16i r5,384
+ 1800124:	70 02 99 81 	e_cmp16i r2,385
+ 1800128:	70 01 a9 c2 	e_cmpl16i r1,450
+ 180012c:	70 02 a9 81 	e_cmpl16i r2,385
+ 1800130:	70 03 a9 81 	e_cmpl16i r3,385
+ 1800134:	70 04 a9 ce 	e_cmpl16i r4,462
+ 1800138:	70 05 a9 80 	e_cmpl16i r5,384
+ 180013c:	70 02 a9 81 	e_cmpl16i r2,385
+ 1800140:	70 01 b1 c2 	e_cmph16i r1,450
+ 1800144:	70 02 b1 81 	e_cmph16i r2,385
+ 1800148:	70 03 b1 81 	e_cmph16i r3,385
+ 180014c:	70 04 b1 ce 	e_cmph16i r4,462
+ 1800150:	70 05 b1 80 	e_cmph16i r5,384
+ 1800154:	70 02 b1 81 	e_cmph16i r2,385
+ 1800158:	70 01 b9 c2 	e_cmphl16i r1,450
+ 180015c:	70 02 b9 81 	e_cmphl16i r2,385
+ 1800160:	70 03 b9 81 	e_cmphl16i r3,385
+ 1800164:	70 04 b9 ce 	e_cmphl16i r4,462
+ 1800168:	70 05 b9 80 	e_cmphl16i r5,384
+ 180016c:	70 02 b9 81 	e_cmphl16i r2,385
+ 1800170:	70 01 89 c2 	e_add2i. r1,450
+ 1800174:	70 02 89 81 	e_add2i. r2,385
+ 1800178:	70 03 89 81 	e_add2i. r3,385
+ 180017c:	70 04 89 ce 	e_add2i. r4,462
+ 1800180:	70 05 89 80 	e_add2i. r5,384
+ 1800184:	70 02 89 81 	e_add2i. r2,385
+ 1800188:	70 01 91 c2 	e_add2is r1,450
+ 180018c:	70 02 91 81 	e_add2is r2,385
+ 1800190:	70 03 91 81 	e_add2is r3,385
+ 1800194:	70 04 91 ce 	e_add2is r4,462
+ 1800198:	70 05 91 80 	e_add2is r5,384
+ 180019c:	70 02 91 81 	e_add2is r2,385
+ 18001a0:	70 01 a1 c2 	e_mull2i r1,450
+ 18001a4:	70 02 a1 81 	e_mull2i r2,385
+ 18001a8:	70 03 a1 81 	e_mull2i r3,385
+ 18001ac:	70 04 a1 ce 	e_mull2i r4,462
+ 18001b0:	70 05 a1 80 	e_mull2i r5,384
+ 18001b4:	70 02 a1 81 	e_mull2i r2,385
+018001b8 <sub3>:
+ 18001b8:	00 04       	se_blr
+018001ba <sub4>:
+ 18001ba:	00 04       	se_blr
+018001bc <sub5>:
+ 18001bc:	00 04       	se_blr
Index: ld/testsuite/ld-powerpc/vle-reloc-2.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-2.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-2.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-2.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,92 @@
+        .section .text
+sub1:
+        se_blr
+
+sub2:
+        se_blr
+
+	.section .text
+vle_reloc_2:
+	e_or2i 1, low@l
+	e_or2i 2, high@h
+	e_or2i 3, high_adjust@ha
+	e_or2i 4, low_sdarel@sdarel@l
+	e_or2i 5, high_sdarel@sdarel@h
+	e_or2i 2, high_adjust_sdarel@sdarel@ha
+
+	e_and2i. 1, low@l
+	e_and2i. 2, high@h
+	e_and2i. 3, high_adjust@ha
+	e_and2i. 4, low_sdarel@sdarel@l
+	e_and2i. 5, high_sdarel@sdarel@h
+	e_and2i. 2, high_adjust_sdarel@sdarel@ha
+
+	e_or2is 1, low@l
+	e_or2is 2, high@h
+	e_or2is 3, high_adjust@ha
+	e_or2is 4, low_sdarel@sdarel@l
+	e_or2is 5, high_sdarel@sdarel@h
+	e_or2is 2, high_adjust_sdarel@sdarel@ha
+
+	e_lis 1, low@l
+	e_lis 2, high@h
+	e_lis 3, high_adjust@ha
+	e_lis 4, low_sdarel@sdarel@l
+	e_lis 5, high_sdarel@sdarel@h
+	e_lis 2, high_adjust_sdarel@sdarel@ha
+
+	e_and2is. 1, low@l
+	e_and2is. 2, high@h
+	e_and2is. 3, high_adjust@ha
+	e_and2is. 4, low_sdarel@sdarel@l
+	e_and2is. 5, high_sdarel@sdarel@h
+	e_and2is. 2, high_adjust_sdarel@sdarel@ha
+
+	e_cmp16i 1, low@l
+	e_cmp16i 2, high@h
+	e_cmp16i 3, high_adjust@ha
+	e_cmp16i 4, low_sdarel@sdarel@l
+	e_cmp16i 5, high_sdarel@sdarel@h
+	e_cmp16i 2, high_adjust_sdarel@sdarel@ha
+
+	e_cmpl16i 1, low@l
+	e_cmpl16i 2, high@h
+	e_cmpl16i 3, high_adjust@ha
+	e_cmpl16i 4, low_sdarel@sdarel@l
+	e_cmpl16i 5, high_sdarel@sdarel@h
+	e_cmpl16i 2, high_adjust_sdarel@sdarel@ha
+
+	e_cmph16i 1, low@l
+	e_cmph16i 2, high@h
+	e_cmph16i 3, high_adjust@ha
+	e_cmph16i 4, low_sdarel@sdarel@l
+	e_cmph16i 5, high_sdarel@sdarel@h
+	e_cmph16i 2, high_adjust_sdarel@sdarel@ha
+
+	e_cmphl16i 1, low@l
+	e_cmphl16i 2, high@h
+	e_cmphl16i 3, high_adjust@ha
+	e_cmphl16i 4, low_sdarel@sdarel@l
+	e_cmphl16i 5, high_sdarel@sdarel@h
+	e_cmphl16i 2, high_adjust_sdarel@sdarel@ha
+
+	e_add2i. 1, low@l
+	e_add2i. 2, high@h
+	e_add2i. 3, high_adjust@ha
+	e_add2i. 4, low_sdarel@sdarel@l
+	e_add2i. 5, high_sdarel@sdarel@h
+	e_add2i. 2, high_adjust_sdarel@sdarel@ha
+
+	e_add2is 1, low@l
+	e_add2is 2, high@h
+	e_add2is 3, high_adjust@ha
+	e_add2is 4, low_sdarel@sdarel@l
+	e_add2is 5, high_sdarel@sdarel@h
+	e_add2is 2, high_adjust_sdarel@sdarel@ha
+
+	e_mull2i 1, low@l
+	e_mull2i 2, high@h
+	e_mull2i 3, high_adjust@ha
+	e_mull2i 4, low_sdarel@sdarel@l
+	e_mull2i 5, high_sdarel@sdarel@h
+	e_mull2i 2, high_adjust_sdarel@sdarel@ha
Index: ld/testsuite/ld-powerpc/vle-reloc-3.d
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-3.d
diff -N ld/testsuite/ld-powerpc/vle-reloc-3.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-3.d	8 May 2012 15:02:12 -0000
@@ -0,0 +1,8 @@
+.*:     file format .*
+
+Disassembly of section .text:
+
+01800094 <sda21_test>:
+ 1800094:	1c ad 80 08 	e_add16i r5,r13,-32760
+ 1800098:	1c a2 80 04 	e_add16i r5,r2,-32764
+ 180009c:	70 00 00 ac 	e_li    r0,172
Index: ld/testsuite/ld-powerpc/vle-reloc-3.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-3.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-3.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-3.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,10 @@
+	.section .text
+	.extern exdat1c
+	.extern exdat2b
+	.extern exdat1a
+	.globl sda21_test
+
+sda21_test:
+	e_add16i  5, 4, exdat1c@sda21
+	e_add16i  5, 4, exdat2b@sda21
+	e_add16i  5, 4, exdat0b@sda21
Index: ld/testsuite/ld-powerpc/vle-reloc-def-1.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-def-1.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-def-1.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-def-1.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,13 @@
+	.section .text
+        .globl sub3
+sub3:
+        se_blr
+
+        .globl sub4
+sub4:
+        se_blr
+
+        .globl sub5
+sub5:
+        se_blr
+
Index: ld/testsuite/ld-powerpc/vle-reloc-def-2.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-def-2.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-def-2.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-def-2.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,41 @@
+	.section .text
+
+        .globl sub3
+sub3:
+        se_blr
+
+        .globl sub4
+sub4:
+        se_blr
+
+        .globl sub5
+sub5:
+        se_blr
+
+	.section .sdata
+	.globl low_sdarel
+low_sdarel:
+	.long	2
+
+	.globl high_adjust_sdarel
+high_adjust_sdarel:
+	.long	0xff
+
+	.section .sdata2
+	.globl	high_sdarel 
+high_sdarel:
+	.long	0xf
+
+
+	.data
+	.globl low
+low:
+	.long 5
+
+	.globl high
+high:
+	.long 0x10
+
+	.globl high_adjust
+high_adjust:
+	.long 0xffff
Index: ld/testsuite/ld-powerpc/vle-reloc-def-3.s
===================================================================
RCS file: ld/testsuite/ld-powerpc/vle-reloc-def-3.s
diff -N ld/testsuite/ld-powerpc/vle-reloc-def-3.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-powerpc/vle-reloc-def-3.s	8 May 2012 15:02:12 -0000
@@ -0,0 +1,29 @@
+		.section .sdata
+		.globl exdat1a
+		.globl exdat1b
+		.globl exdat1c
+exdat1a:	.long 6
+exdat1b:	.long 7
+exdat1c:	.long 8
+
+		.section .sdata2
+		.globl exdat2a
+		.globl exdat2b
+		.globl exdat2c
+exdat2a:	 .long 5
+exdat2b:	 .long 4
+exdat2c:	 .long 3
+
+		.section .PPC.EMB.sdata0
+		.globl exdat0a
+		.globl exdat0b
+		.globl exdat0c
+exdat0a:	 .long 1
+exdat0b:	 .long 2
+exdat0c:	 .long 3
+
+		.section .sbss
+		.globl exbss1a
+		.globl exbss1b
+exbss1a:	.int
+exbss1b:	.int