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PATCH: Add .d8 suffix support to x86 assembler
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: binutils at sourceware dot org
- Date: Fri, 20 Jan 2012 12:56:26 -0800
- Subject: PATCH: Add .d8 suffix support to x86 assembler
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
We can use .d32 suffix to encode displacement in 32bit. But we can't
force 0 displacement. This patch adds .d8 suffix support to force
0 displacement.
H.J.
---
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 21097b7..984e2ee 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Replace disp32_encoding with
+ disp_encoding.
+ (md_assemble): Updated.
+ (output_branch): Likewise.
+ (parse_insn): Support .d8 suffix.
+ (build_modrm_byte): Fake zero displacement for .d8 and .d32
+ suffixes.
+
+ * doc/c-i386.texi: Document .d8 suffix.
+
2012-01-17 Andrew Burgess <aburgess@broadcom.com>
* write.c (fix_new_internal): Don't mark used parameter as unused.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 9e83a4d..dbac2ce 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -280,8 +280,13 @@ struct _i386_insn
/* Swap operand in encoding. */
unsigned int swap_operand;
- /* Force 32bit displacement in encoding. */
- unsigned int disp32_encoding;
+ /* Prefer 8bit or 32bit displacement in encoding. */
+ enum
+ {
+ disp_encoding_default = 0,
+ disp_encoding_8bit,
+ disp_encoding_32bit
+ } disp_encoding;
/* Error message. */
enum i386_error error;
@@ -3053,7 +3058,7 @@ md_assemble (char *line)
/* Don't optimize displacement for movabs since it only takes 64bit
displacement. */
if (i.disp_operands
- && !i.disp32_encoding
+ && i.disp_encoding != disp_encoding_32bit
&& (flag_code != CODE_64BIT
|| strcmp (mnemonic, "movabs") != 0))
optimize_disp ();
@@ -3332,11 +3337,15 @@ parse_insn (char *line, char *mnemonic)
encoding. */
if (mnem_p - 2 == dot_p && dot_p[1] == 's')
i.swap_operand = 1;
+ else if (mnem_p - 3 == dot_p
+ && dot_p[1] == 'd'
+ && dot_p[2] == '8')
+ i.disp_encoding = disp_encoding_8bit;
else if (mnem_p - 4 == dot_p
&& dot_p[1] == 'd'
&& dot_p[2] == '3'
&& dot_p[3] == '2')
- i.disp32_encoding = 1;
+ i.disp_encoding = disp_encoding_32bit;
else
goto check_suffix;
mnem_p = dot_p;
@@ -5698,7 +5707,19 @@ build_modrm_byte (void)
|| i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL))
i.rm.mode = 0;
else
- i.rm.mode = mode_from_disp_size (i.types[op]);
+ {
+ if (!fake_zero_displacement
+ && !i.disp_operands
+ && i.disp_encoding)
+ {
+ fake_zero_displacement = 1;
+ if (i.disp_encoding == disp_encoding_8bit)
+ i.types[op].bitfield.disp8 = 1;
+ else
+ i.types[op].bitfield.disp32 = 1;
+ }
+ i.rm.mode = mode_from_disp_size (i.types[op]);
+ }
}
if (fake_zero_displacement)
@@ -5900,7 +5921,7 @@ output_branch (void)
offsetT off;
code16 = flag_code == CODE_16BIT ? CODE16 : 0;
- size = i.disp32_encoding ? BIG : SMALL;
+ size = i.disp_encoding == disp_encoding_32bit ? BIG : SMALL;
prefix = 0;
if (i.prefix[DATA_PREFIX] != 0)
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 57f9146..07f3462 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -440,8 +440,8 @@ quadruple word).
Different encoding options can be specified via optional mnemonic
suffix. @samp{.s} suffix swaps 2 register operands in encoding when
-moving from one register to another. @samp{.d32} suffix forces 32bit
-displacement in encoding.
+moving from one register to another. @samp{.d8} or @samp{.d32} suffix
+prefers 8bit or 32bit displacement in encoding.
@cindex conversion instructions, i386
@cindex i386 conversion instructions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b217aa5..80bf81b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/disp32.s: Add tests for .d8 suffix.
+ * gas/i386/x86-64-disp32.s: Likewise.
+
+ * gas/i386/disp32.d: Updated.
+ * gas/i386/x86-64-disp32.d: Likewise.
+
2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
* gas/m68k/pmove.s, gas/m68k/pmove.d: New test.
diff --git a/gas/testsuite/gas/i386/disp32.d b/gas/testsuite/gas/i386/disp32.d
index 68fd3e8..37629f6 100644
--- a/gas/testsuite/gas/i386/disp32.d
+++ b/gas/testsuite/gas/i386/disp32.d
@@ -7,13 +7,24 @@
Disassembly of section .text:
-0+ <.*>:
+0+ <foo-0x26>:
+[ ]*[a-f0-9]+: 8b 18 mov \(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 58 00 mov 0x0\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
-[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 <foo>
+[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
-0+10 <foo>:
+0+26 <foo>:
+[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
+[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
+[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
+[ ]*[a-f0-9]+: 89 58 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
+[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
#pass
diff --git a/gas/testsuite/gas/i386/disp32.s b/gas/testsuite/gas/i386/disp32.s
index de34f41..c3bec3a 100644
--- a/gas/testsuite/gas/i386/disp32.s
+++ b/gas/testsuite/gas/i386/disp32.s
@@ -1,11 +1,26 @@
.text
+ mov (%eax),%ebx
mov 3(%eax),%ebx
+
+ mov.d8 (%eax),%ebx
+ mov.d8 3(%eax),%ebx
+ mov.d8 0xfff(%eax),%ebx
+
+ mov.d32 (%eax),%ebx
mov.d32 3(%eax),%ebx
jmp foo
+ jmp.d8 foo
jmp.d32 foo
foo:
.intel_syntax noprefix
+ mov DWORD PTR [eax], ebx
mov DWORD PTR [eax+3], ebx
+ mov DWORD PTR [eax+0xfff], ebx
+
+ mov.d8 DWORD PTR [eax], ebx
+ mov.d8 DWORD PTR [eax+3], ebx
+
+ mov.d32 DWORD PTR [eax], ebx
mov.d32 DWORD PTR [eax+3], ebx
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.d b/gas/testsuite/gas/i386/x86-64-disp32.d
index c3d70a1..76d4647 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.d
+++ b/gas/testsuite/gas/i386/x86-64-disp32.d
@@ -7,13 +7,24 @@
Disassembly of section .text:
-0+ <.*>:
+0+ <foo-0x26>:
+[ ]*[a-f0-9]+: 8b 18 mov \(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 58 00 mov 0x0\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
-[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo>
+[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
-0+10 <foo>:
+0+26 <foo>:
+[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
+[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
+[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
+[ ]*[a-f0-9]+: 89 58 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
+[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.s b/gas/testsuite/gas/i386/x86-64-disp32.s
index b0e83e1..0856339 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.s
+++ b/gas/testsuite/gas/i386/x86-64-disp32.s
@@ -1,11 +1,26 @@
.text
+ mov (%rax),%ebx
mov 3(%rax),%ebx
+
+ mov.d8 (%rax),%ebx
+ mov.d8 3(%rax),%ebx
+ mov.d8 0xfff(%rax),%ebx
+
+ mov.d32 (%rax),%ebx
mov.d32 3(%rax),%ebx
jmp foo
+ jmp.d8 foo
jmp.d32 foo
foo:
.intel_syntax noprefix
+ mov DWORD PTR [rax], ebx
mov DWORD PTR [rax+3], ebx
+ mov DWORD PTR [rax+0xfff], ebx
+
+ mov.d8 DWORD PTR [rax], ebx
+ mov.d8 DWORD PTR [rax+3], ebx
+
+ mov.d32 DWORD PTR [rax], ebx
mov.d32 DWORD PTR [rax+3], ebx