This is the mail archive of the
mailing list for the binutils project.
Re: [MIPS] Add saa and saad instructions for octeon
Andrew Pinski <firstname.lastname@example.org> writes:
> * archures.c (bfd_mach_mips_octeonp): New macro.
> * bfd-in2.h: Regenerate.
> * bfd/cpu-mips.c (I_mipsocteonp): New enum value.
> (arch_info_struct): Add bfd_mach_mips_octeonp.
> * elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
> (mips_mach_extensions): Add bfd_mach_mips_octeonp.
> * config/tc-mips.c (CPU_IS_OCTEON): New macro function.
> (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
> (NO_ISA_COP): Likewise.
> (macro) <ld_st>: Add support when off0 is true.
> Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
> (mips_cpu_info_table): Add octeon+.
> * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=
> * gas/mips/mips.exp: Add octeon+ for an architecture.
> Run octeon-saa-saad test.
> (run_dump_test_arch): For Octeon architectures, also try octeon@.
> * gas/mips/octeon-pref.d: Remove -march=octeon from command line.
> * gas/mips/octeon.d: Likewise.
> * gas/mips/octeon-saa-saad.d: New file.
> * gas/mips/octeon-saa-saad.s: New file
> * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
> (INSN_OCTEONP): New macro.
> (CPU_OCTEONP): New macro.
> (OPCODE_IS_MEMBER): Add Octeon+.
> (M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
> * mips-dis.c (mips_arch_choices): Add Octeon+.
> * mips-opc.c (IOCT): Include Octeon+.
> (IOCTP): New macro.
> (mips_builtin_opcodes): Add "saa" and "saad".
OK, thanks. Please run the binutils testsuite for a mips*-linux-gnu
target to make sure there are no alignment problems with the tests.
If they fail, please either (1) add "#pass" to the dumps or
(2) add "\.\.\." to the dumps and add:
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
to the source (whichever you prefer).
I might try to combine off0 and off12 into a single variable at some
point, but that's a logically-separate change that shouldn't be part of
the main Octeon+ patch.