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[PATCH] Fix ColdFire movem with disp16+reg addressing
- From: Julian Brown <julian at codesourcery dot com>
- To: binutils at sourceware dot org
- Cc: schwab at linux-m68k dot org
- Date: Tue, 18 Oct 2011 11:12:05 +0100
- Subject: [PATCH] Fix ColdFire movem with disp16+reg addressing
Hi,
Both assembly and disassembly of movem for ColdFire has apparently been
broken since the following patch was applied:
http://sourceware.org/ml/binutils/2011-09/msg00005.html
For assembly, the way the table entries for ColdFire moveml in
m68k-opc.c were merged meant that actual mode5 addresses (i.e.
disp16+reg, with non-zero displacement) were actually emitted as mode 7
-- i.e., with bit 1 of the mode set. That gives an illegal instruction
on ColdFire.
Disassembly of those "mode 7" moveml instructions also didn't work, nor
did disassembly of genuine mode 5 moveml instructions. This patch fixes
both problems, and adds a test case for good measure.
OK to apply?
Thanks,
Julian
ChangeLog
opcodes/
* m68k-opc.c (m68k_opcodes): Fix entries for ColdFire moveml.
gas/testsuite/
* gas/m68k/all.exp (movem-offset): Add test.
* gas/m68k/movem-offset.s: New test.
* gas/m68k/movem-offset.d: New.
Index: gas/testsuite/gas/m68k/all.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68k/all.exp,v
retrieving revision 1.27
diff -u -p -r1.27 all.exp
--- gas/testsuite/gas/m68k/all.exp 7 Sep 2011 20:56:09 -0000 1.27
+++ gas/testsuite/gas/m68k/all.exp 18 Oct 2011 09:32:03 -0000
@@ -52,6 +52,8 @@ if { [istarget m68*-*-*] || [istarget fi
run_dump_test mcf-movsr
run_dump_test mode5
run_dump_test mode5 "{name {cf}} {as {-mcpu=5200}}"
+ run_dump_test movem-offset
+ run_dump_test movem-offset "{name {cf}} {as {-mcpu=5485}}"
run_dump_test mcf-mac
run_dump_test mcf-emac
run_dump_test mcf-coproc
Index: gas/testsuite/gas/m68k/movem-offset.d
===================================================================
RCS file: gas/testsuite/gas/m68k/movem-offset.d
diff -N gas/testsuite/gas/m68k/movem-offset.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/m68k/movem-offset.d 18 Oct 2011 09:32:03 -0000
@@ -0,0 +1,14 @@
+#name: movem-offset
+#objdump: -d
+#as:
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.text>:
+ 0: 4cee 047c ffe8 moveml %fp@\(-24\),%d2-%d6/%a2
+ 6: 48ee 047c 0010 moveml %d2-%d6/%a2,%fp@\(16\)
+ c: 4cee 03ff ffe8 moveml %fp@\(-24\),%d0-%a1
+ 12: 48ee 03ff 0010 moveml %d0-%a1,%fp@\(16\)
+ \.\.\.
Index: gas/testsuite/gas/m68k/movem-offset.s
===================================================================
RCS file: gas/testsuite/gas/m68k/movem-offset.s
diff -N gas/testsuite/gas/m68k/movem-offset.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/m68k/movem-offset.s 18 Oct 2011 09:32:03 -0000
@@ -0,0 +1,8 @@
+
+ | Check that non-zero displacements work for movem.
+ .text
+ movem.l -24(%a6),#1148
+ movem.l #1148,16(%a6)
+ movem.l -24(%a6),%d0-%d7/%a0-%a1
+ movem.l %d0-%d7/%a0-%a1,16(%a6)
+ .p2align 4
Index: opcodes/m68k-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/m68k-opc.c,v
retrieving revision 1.36
diff -u -p -r1.36 m68k-opc.c
--- opcodes/m68k-opc.c 7 Sep 2011 20:56:09 -0000 1.36
+++ opcodes/m68k-opc.c 18 Oct 2011 09:32:03 -0000
@@ -1553,10 +1553,10 @@ const struct m68k_opcode m68k_opcodes[]
{"moveml", 4, one(0044300), one(0177700), "#w>s", m68000up },
{"moveml", 4, one(0046300), one(0177700), "<sLw", m68000up },
{"moveml", 4, one(0046300), one(0177700), "<s#w", m68000up },
-{"moveml", 4, one(0044320), one(0177770), "Lwys", mcfisa_a },
-{"moveml", 4, one(0044320), one(0177770), "#wys", mcfisa_a },
-{"moveml", 4, one(0046320), one(0177770), "ysLw", mcfisa_a },
-{"moveml", 4, one(0046320), one(0177770), "ys#w", mcfisa_a },
+{"moveml", 4, one(0044300), one(0177700), "Lwys", mcfisa_a },
+{"moveml", 4, one(0044300), one(0177700), "#wys", mcfisa_a },
+{"moveml", 4, one(0046300), one(0177700), "ysLw", mcfisa_a },
+{"moveml", 4, one(0046300), one(0177700), "ys#w", mcfisa_a },
{"movepw", 2, one(0000410), one(0170770), "dsDd", m68000up },
{"movepw", 2, one(0000610), one(0170770), "Ddds", m68000up },