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[PATCH] Add sparc integer multiply-add instructions.
- From: David Miller <davem at davemloft dot net>
- To: binutils at sourceware dot org
- Date: Mon, 26 Sep 2011 05:21:02 -0400 (EDT)
- Subject: [PATCH] Add sparc integer multiply-add instructions.
Strangely enough these use the floating point registers.
Committed to trunk.
opcodes/
* sparc-opc.c (sparc_opcodes): Add integer multiply-add
instructions.
gas/testsuite/
* gas/sparc/ima.d: New test.
* gas/sparc/ima.s: New test source.
* gas/sparc/sparc.exp: Run new test.
---
gas/testsuite/gas/sparc/ima.d | 11 +++++++++++
gas/testsuite/gas/sparc/ima.s | 4 ++++
gas/testsuite/gas/sparc/sparc.exp | 1 +
opcodes/sparc-opc.c | 2 ++
4 files changed, 18 insertions(+), 0 deletions(-)
create mode 100644 gas/testsuite/gas/sparc/ima.d
create mode 100644 gas/testsuite/gas/sparc/ima.s
diff --git a/gas/testsuite/gas/sparc/ima.d b/gas/testsuite/gas/sparc/ima.d
new file mode 100644
index 0000000..d499183
--- /dev/null
+++ b/gas/testsuite/gas/sparc/ima.d
@@ -0,0 +1,11 @@
+#as: -Av9v
+#objdump: -dr
+#name: sparc IMA
+
+.*: +file format .*sparc.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 91 ba 84 0c fpmaddx %f10, %f12, %f2, %f8
+ 4: a5 bb 8e 88 fpmaddxhi %f14, %f8, %f38, %f18
diff --git a/gas/testsuite/gas/sparc/ima.s b/gas/testsuite/gas/sparc/ima.s
new file mode 100644
index 0000000..f02578b
--- /dev/null
+++ b/gas/testsuite/gas/sparc/ima.s
@@ -0,0 +1,4 @@
+# Test IMA instructions
+ .text
+ fpmaddx %f10, %f12, %f2, %f8
+ fpmaddxhi %f14, %f8, %f38, %f18
diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp
index faba8e4..65e84ce 100644
--- a/gas/testsuite/gas/sparc/sparc.exp
+++ b/gas/testsuite/gas/sparc/sparc.exp
@@ -61,6 +61,7 @@ if [istarget sparc*-*-*] {
run_dump_test "v9branch5"
run_dump_test "pc2210"
run_dump_test "hpcvis3"
+ run_dump_test "ima"
run_list_test "pr4587" ""
}
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index 5cfb4d5..6fbe025 100644
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -1849,8 +1849,10 @@ SLCBCC("cbnefr", 15),
{ "fnhadds", F3F(2, 0x34, 0x071), F3F(~2, ~0x34, ~0x071), "e,f,g", F_FLOAT|F_HPC, v9b },
{ "fnhaddd", F3F(2, 0x34, 0x072), F3F(~2, ~0x34, ~0x072), "v,B,H", F_FLOAT|F_HPC, v9b },
{ "fnsmuld", F3F(2, 0x34, 0x079), F3F(~2, ~0x34, ~0x079), "e,f,H", F_FLOAT|F_HPC, v9b },
+{ "fpmaddx", F3(2, 0x37, 0)|OPF_LOW4(0), F3(~2, ~0x37, 0)|OPF_LOW4(~0), "v,B,5,H", F_FLOAT|F_IMA, v9b },
{ "fmadds", F3(2, 0x37, 0)|OPF_LOW4(1), F3(~2, ~0x37, 0)|OPF_LOW4(~1), "e,f,4,g", F_FLOAT|F_FMAF, v9b },
{ "fmaddd", F3(2, 0x37, 0)|OPF_LOW4(2), F3(~2, ~0x37, 0)|OPF_LOW4(~2), "v,B,5,H", F_FLOAT|F_FMAF, v9b },
+{ "fpmaddxhi", F3(2, 0x37, 0)|OPF_LOW4(4), F3(~2, ~0x37, 0)|OPF_LOW4(~4), "v,B,5,H", F_FLOAT|F_IMA, v9b },
{ "fmsubs", F3(2, 0x37, 0)|OPF_LOW4(5), F3(~2, ~0x37, 0)|OPF_LOW4(~5), "e,f,4,g", F_FLOAT|F_FMAF, v9b },
{ "fmsubd", F3(2, 0x37, 0)|OPF_LOW4(6), F3(~2, ~0x37, 0)|OPF_LOW4(~6), "v,B,5,H", F_FLOAT|F_FMAF, v9b },
{ "fnmsubs", F3(2, 0x37, 0)|OPF_LOW4(9), F3(~2, ~0x37, 0)|OPF_LOW4(~9), "e,f,4,g", F_FLOAT|F_FMAF, v9b },
--
1.7.6.401.g6a319