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Re: [PATC] MIPS16/GAS: Permit branch swapping with PC-relative insns
On Thu, 11 Aug 2011, Richard Sandiford wrote:
> But that ADDIUPC can't be swapped. The offset is negative, so you need
> the extended rather than 2-byte instruction.
Fair enough, although this was just an ad-hoc illustration.
> My point is that the only case in which you can swap is:
> (a) The instruction refers to the start of the ADDIUPC instruction itself,
> perhaps using a constant, or perhaps using symbolic arithmetic.
> In that case, swapping seems counter-intuitive at best. We'd be
> changing the ADDIUPC so that it refers to a jump, even though the
> source "obviously" refers to the ADDIUPC.
> (b) The instruction has a hard-coded, nonzero, 8-bit unsigned offset
> (so that no relaxation is required). We both agree that such an
> offset shouldn't appear in a reorder block.
> The only effect of your patch is to change (a) and (b) in a
> backwards-incompatible way. It brings no benefit, and IMO even
> makes things conceptually worse. I say that because you're proposing
> that we remove the traditional treatment of ADDIUPC for MIPS16 just
> after we have added code to make microMIPS ADDIUPC follow the traditional
> MIPS16 behaviour (rather than, say, allowing the instructions to be
> swapped for microMIPS, and adjusting the offset to compensate).
> So not only would the patch be gratuitously breaking backwards
> compatibility, it would also introduce a new inconsistency between
> MIPS16 and microMIPS.
I guess if someone insists on this optimisation, then they can use a
noreorder block and schedule the instruction into the delay slot manually.
It's a bit fragile if the immediate value is not guaranteed to fit in a
16-bit instruction, but at least it'll break at the assembly time if it
does not. As I say I won't be pushing this change any further now.
Tweaking the offset of microMIPS ADDIUPC doesn't seem functionally
consistent to me as GAS traditionally has not made any adjustments to any
expressions while doing branch swapping.