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Binutils patch to add support for Open8 MCU[part 1 of 21]
- From: khays at hayshaus dot com (Kirk Hays)
- To: binutils at sourceware dot org
- Date: Wed, 30 Mar 2011 14:31:09 -0700
- Subject: Binutils patch to add support for Open8 MCU[part 1 of 21]
diff --git ChangeLog ChangeLog
index 281c2a2..787f896 100644
--- ChangeLog
+++ ChangeLog
@@ -1,3 +1,172 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * bfd/Makefile.am: Add support for Open8 MCU
+ * bfd/Makefile.in: Add support for Open8 MCU
+ * bfd/archures.c: Add support for Open8 MCU
+ * bfd/bfd-in2.h: Add support for Open8 MCU
+ * bfd/config.bfd: Add support for Open8 MCU
+ * bfd/configure: Add support for Open8 MCU
+ * bfd/configure.in: Add support for Open8 MCU
+ * bfd/cpu-open8.c: Add support for Open8 MCU
+ * bfd/elf-bfd.h: Add support for Open8 MCU
+ * bfd/elf32-open8.c: Add support for Open8 MCU
+ * bfd/elf32-open8.h: Add support for Open8 MCU
+ * bfd/libbfd.h: Add support for Open8 MCU
+ * bfd/reloc.c: Add support for Open8 MCU
+ * bfd/targets.c: Add support for Open8 MCU
+ * binutils/readelf.c: Add support for Open8 MCU
+ * binutils/testsuite/binutils-all/objdump.exp: Add support for Open8 MCU
+ * config.sub: Add support for Open8 MCU
+ * configure: Add support for Open8 MCU
+ * configure.ac: Add support for Open8 MCU
+ * elfcpp/elfcpp.h: Add support for Open8 MCU
+ * gas/Makefile.am: Add support for Open8 MCU
+ * gas/Makefile.in: Add support for Open8 MCU
+ * gas/config/tc-open8.c: Add support for Open8 MCU
+ * gas/config/tc-open8.h: Add support for Open8 MCU
+ * gas/configure.tgt: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/adc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/adc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/add.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/add.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/and.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/and.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/br0.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/br0.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/br1.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/br1.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brgez.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brgez.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brk.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brk.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brlz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brlz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brnc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brnc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brnz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brnz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/brz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/btt.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/btt.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cli.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cli.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cln.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cln.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/clz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cmp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/cmp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/dbnz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/dbnz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/dec.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/dec.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/gmsk.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/gmsk.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/inc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/inc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/int.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/int.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmp_2.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmp_2.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpgez.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpgez.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmplz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmplz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpnc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpnc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpnz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpnz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jmpz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jsr.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/jsr.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/lda.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/lda.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldi.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldi.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldo.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldo.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldx.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ldx.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/mul.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/mul.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/nop.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/nop.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/open8.exp: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/or.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/or.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/pop.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/pop.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/psh.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/psh.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rol.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rol.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ror.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/ror.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rsp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rsp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rti.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rti.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rts.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/rts.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sample.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sample.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sbc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sbc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/smsk.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/smsk.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sta.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sta.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stc.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stc.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sti.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sti.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stn.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stn.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sto.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/sto.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stx.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stx.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stz.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/stz.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/t0x.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/t0x.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/tx0.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/tx0.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/upp.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/upp.s: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/xor.d: Add support for Open8 MCU
+ * gas/testsuite/gas/open8/xor.s: Add support for Open8 MCU
+ * include/dis-asm.h: Add support for Open8 MCU
+ * include/elf/common.h: Add support for Open8 MCU
+ * include/elf/open8.h: Add support for Open8 MCU
+ * include/opcode/open8.h: Add support for Open8 MCU
+ * ld/Makefile.am: Add support for Open8 MCU
+ * ld/Makefile.in: Add support for Open8 MCU
+ * ld/configure.tgt: Add support for Open8 MCU
+ * ld/emulparams/open8_1.sh: Add support for Open8 MCU
+ * ld/emultempl/open8elf.em: Add support for Open8 MCU
+ * ld/scripttempl/open8.sc: Add support for Open8 MCU
+ * opcodes/Makefile.am: Add support for Open8 MCU
+ * opcodes/Makefile.in: Add support for Open8 MCU
+ * opcodes/configure: Add support for Open8 MCU
+ * opcodes/configure.in: Add support for Open8 MCU
+ * opcodes/disassemble.c: Add support for Open8 MCU
+ * opcodes/open8-dis.c: Add support for Open8 MCU
+
2011-03-28 Joseph Myers <joseph@codesourcery.com>
* configure.ac (i[[3456789]]86-*-msdosdjgpp*): Don't disable
diff --git bfd/ChangeLog bfd/ChangeLog
index 0fe565e..cf0d02a 100644
--- bfd/ChangeLog
+++ bfd/ChangeLog
@@ -1,3 +1,20 @@
+2011-03-30 Kirk Hays <khays@hayshaus.com>
+
+ * Makefile.am: Add support for Open8 MCU
+ * Makefile.in: Add support for Open8 MCU
+ * archures.c: Add support for Open8 MCU
+ * bfd-in2.h: Add support for Open8 MCU
+ * config.bfd: Add support for Open8 MCU
+ * configure: Add support for Open8 MCU
+ * configure.in: Add support for Open8 MCU
+ * cpu-open8.c: Add support for Open8 MCU
+ * elf-bfd.h: Add support for Open8 MCU
+ * elf32-open8.c: Add support for Open8 MCU
+ * elf32-open8.h: Add support for Open8 MCU
+ * libbfd.h: Add support for Open8 MCU
+ * reloc.c: Add support for Open8 MCU
+ * targets.c: Add support for Open8 MCU
+
2011-03-30 Nick Clifton <nickc@redhat.com>
* po/da.po: Updated Danish translation.
diff --git bfd/Makefile.am bfd/Makefile.am
index 9c454cc..5348f92 100644
--- bfd/Makefile.am
+++ bfd/Makefile.am
@@ -114,6 +114,7 @@ ALL_MACHINES = \
cpu-msp430.lo \
cpu-mt.lo \
cpu-ns32k.lo \
+ cpu-open8.lo \
cpu-openrisc.lo \
cpu-or32.lo \
cpu-pdp11.lo \
@@ -186,6 +187,7 @@ ALL_MACHINES_CFILES = \
cpu-msp430.c \
cpu-mt.c \
cpu-ns32k.c \
+ cpu-open8.c \
cpu-openrisc.c \
cpu-or32.c \
cpu-pdp11.c \
@@ -306,6 +308,7 @@ BFD32_BACKENDS = \
elf32-moxie.lo \
elf32-msp430.lo \
elf32-mt.lo \
+ elf32-open8.lo \
elf32-openrisc.lo \
elf32-or32.lo \
elf32-pj.lo \
@@ -487,6 +490,7 @@ BFD32_BACKENDS_CFILES = \
elf32-moxie.c \
elf32-msp430.c \
elf32-mt.c \
+ elf32-open8.c \
elf32-openrisc.c \
elf32-or32.c \
elf32-pj.c \
diff --git bfd/Makefile.in bfd/Makefile.in
index 2cbf6a0..6457f5a 100644
--- bfd/Makefile.in
+++ bfd/Makefile.in
@@ -413,6 +413,7 @@ ALL_MACHINES = \
cpu-msp430.lo \
cpu-mt.lo \
cpu-ns32k.lo \
+ cpu-open8.lo \
cpu-openrisc.lo \
cpu-or32.lo \
cpu-pdp11.lo \
@@ -485,6 +486,7 @@ ALL_MACHINES_CFILES = \
cpu-msp430.c \
cpu-mt.c \
cpu-ns32k.c \
+ cpu-open8.c \
cpu-openrisc.c \
cpu-or32.c \
cpu-pdp11.c \
@@ -606,6 +608,7 @@ BFD32_BACKENDS = \
elf32-moxie.lo \
elf32-msp430.lo \
elf32-mt.lo \
+ elf32-open8.lo \
elf32-openrisc.lo \
elf32-or32.lo \
elf32-pj.lo \
@@ -787,6 +790,7 @@ BFD32_BACKENDS_CFILES = \
elf32-moxie.c \
elf32-msp430.c \
elf32-mt.c \
+ elf32-open8.c \
elf32-openrisc.c \
elf32-or32.c \
elf32-pj.c \
@@ -1275,6 +1279,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-msp430.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mt.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ns32k.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-open8.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-openrisc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-or32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-pdp11.Plo@am__quote@
@@ -1354,6 +1359,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-moxie.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-msp430.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mt.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-open8.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-openrisc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-or32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-pj.Plo@am__quote@
diff --git bfd/archures.c bfd/archures.c
index cd8500f..283b779 100644
--- bfd/archures.c
+++ bfd/archures.c
@@ -437,6 +437,8 @@ DESCRIPTION
. bfd_arch_lm32, {* Lattice Mico32 *}
.#define bfd_mach_lm32 1
. bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
+. bfd_arch_open8, {* Open8/ARClite/V8 microcontrollers. *}
+.#define bfd_mach_open8_1 1
. bfd_arch_last
. };
*/
@@ -518,6 +520,7 @@ extern const bfd_arch_info_type bfd_moxie_arch;
extern const bfd_arch_info_type bfd_msp430_arch;
extern const bfd_arch_info_type bfd_mt_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
+extern const bfd_arch_info_type bfd_open8_arch;
extern const bfd_arch_info_type bfd_openrisc_arch;
extern const bfd_arch_info_type bfd_or32_arch;
extern const bfd_arch_info_type bfd_pdp11_arch;
@@ -595,6 +598,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_msp430_arch,
&bfd_mt_arch,
&bfd_ns32k_arch,
+ &bfd_open8_arch,
&bfd_openrisc_arch,
&bfd_or32_arch,
&bfd_pdp11_arch,
diff --git bfd/bfd-in2.h bfd/bfd-in2.h
index 9a470ae..9fc7ff3 100644
--- bfd/bfd-in2.h
+++ bfd/bfd-in2.h
@@ -2124,6 +2124,8 @@ enum bfd_architecture
bfd_arch_lm32, /* Lattice Mico32 */
#define bfd_mach_lm32 1
bfd_arch_microblaze,/* Xilinx MicroBlaze. */
+ bfd_arch_open8, /* Open8/ARClite/V8 microcontrollers. */
+#define bfd_mach_open8_1 1
bfd_arch_last
};
@@ -4589,6 +4591,32 @@ This is the 5 bits of a value. */
BFD_RELOC_IQ2000_OFFSET_21,
BFD_RELOC_IQ2000_UHI16,
+/* This is a 8 bit reloc for the Open8 that stores 8 bit pc relative
+signed short offset into relative branch instructions. */
+ BFD_RELOC_OPEN8_PCREL,
+
+/* This is an 8 bit reloc for the Open8 that stores 8 bit value (usually
+data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_OPEN8_LO8_LDI,
+
+/* This is a 8 bit reloc for the Open8 that stores 8 bit value
+(high 8 bits of data memory address) into 8 bit immediate value
+of LDI insn. */
+ BFD_RELOC_OPEN8_HI8_LDI,
+
+/* This is an 8 bit reloc for the Open8 that stores a negated 8 bit value
+(usually data memory address) into 8 bit immediate value of LDI insn. */
+ BFD_RELOC_OPEN8_LO8_LDI_NEG,
+
+/* This is a 8 bit reloc for the Open8 that stores negated 8 bit value
+(high 8 bits of data memory address) into 8 bit immediate value of
+LDI insn. */
+ BFD_RELOC_OPEN8_HI8_LDI_NEG,
+
+/* This is a 16 bit reloc for the Open8 that stores targets of jumps
+and calls. */
+ BFD_RELOC_OPEN8_CALL,
+
/* Special Xtensa relocation used only by PLT entries in ELF shared
objects to indicate that the runtime linker should set the value
to one of its own internal functions or data structures. */
diff --git bfd/config.bfd bfd/config.bfd
index 5e67d6b..0adb03c 100644
--- bfd/config.bfd
+++ bfd/config.bfd
@@ -92,6 +92,7 @@ m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
microblaze*) targ_archs=bfd_microblaze_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
+open8*) targ_archs=bfd_open8_arch ;;
or32*) targ_archs=bfd_or32_arch ;;
pdp11*) targ_archs=bfd_pdp11_arch ;;
pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
@@ -1091,6 +1092,10 @@ case "${targ}" in
targ_underscore=yes
;;
+ open8*-*-*)
+ targ_defvec=bfd_elf32_open8_vec
+ ;;
+
openrisc-*-elf)
targ_defvec=bfd_elf32_openrisc_vec
;;
diff --git bfd/configure bfd/configure
index d587593..8fa9e22 100755
--- bfd/configure
+++ bfd/configure
@@ -15107,6 +15107,7 @@ do
tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec | bfd_elf32_ntradlittlemips_freebsd_vec)
tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_open8_vec) tb="$tb elf32-open8.lo elf32.lo $elf" ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
diff --git bfd/configure.in bfd/configure.in
index eaba44c..46bbf50 100644
--- bfd/configure.in
+++ bfd/configure.in
@@ -750,6 +750,7 @@ do
tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec | bfd_elf32_ntradlittlemips_freebsd_vec)
tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_open8_vec) tb="$tb elf32-open8.lo elf32.lo $elf" ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
diff --git bfd/cpu-open8.c bfd/cpu-open8.c
new file mode 100644
index 0000000..0008a89
--- /dev/null
+++ bfd/cpu-open8.c
@@ -0,0 +1,69 @@
+/* BFD library support routines for the Open8 architecture.
+ Copyright 1999, 2000, 2002, 2005, 2006, 2007, 2008, 2010, 2011
+ Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+/* This routine is provided two arch_infos and works out which Open8
+ machine which would be compatible with both and returns a pointer
+ to its info structure. */
+
+static const bfd_arch_info_type *
+compatible (const bfd_arch_info_type * a,
+ const bfd_arch_info_type * b)
+{
+ /* If a & b are for different architectures we can do nothing. */
+ if (a->arch != b->arch)
+ return NULL;
+
+ if (a->mach == b->mach)
+ return a;
+
+ return NULL;
+}
+
+#define N(addr_bits, machine, print, default, next) \
+ { \
+ 8, /* 8 bits in a word. */ \
+ addr_bits, /* bits in an address. */ \
+ 8, /* 8 bits in a byte. */ \
+ bfd_arch_open8, \
+ machine, /* Machine number. */ \
+ "open8", /* Architecture name. */ \
+ print, /* Printable name. */ \
+ 1, /* Section align power. */ \
+ default, /* Is this the default? */ \
+ compatible, \
+ bfd_default_scan, \
+ next \
+ }
+
+static const bfd_arch_info_type arch_info_struct[] =
+ {
+ /* Base Architecture - instructions common to all variants, base ABI. */
+ N (16, bfd_mach_open8_1, "open8", TRUE, NULL),
+ };
+
+const bfd_arch_info_type bfd_open8_arch =
+ N (16, bfd_mach_open8_1, "open8", TRUE, NULL);
diff --git bfd/elf-bfd.h bfd/elf-bfd.h
index 21ec38f..74e491f 100644
--- bfd/elf-bfd.h
+++ bfd/elf-bfd.h
@@ -423,6 +423,7 @@ enum elf_target_id
MICROBLAZE_ELF_DATA,
MIPS_ELF_DATA,
MN10300_ELF_DATA,
+ OPEN8_ELF_DATA,
PPC32_ELF_DATA,
PPC64_ELF_DATA,
S390_ELF_DATA,
diff --git bfd/elf32-open8.c bfd/elf32-open8.c
new file mode 100644
index 0000000..704f757
--- /dev/null
+++ bfd/elf32-open8.c
@@ -0,0 +1,2219 @@
+/* Open8-specific support for 32-bit ELF
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009, 2010, 2011 Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/open8.h"
+#include "elf32-open8.h"
+
+/* Enable debugging printout at stdout with this variable. */
+static bfd_boolean debug_relax = FALSE;
+
+/* Enable debugging printout at stdout with this variable. */
+static bfd_boolean debug_stubs = FALSE;
+
+/* Hash table initialization and handling. Code is taken from the hppa port
+ and adapted to the needs of OPEN8. */
+
+/* We use two hash tables to hold information for linking open8 objects.
+
+ The first is the elf32_open8_link_hash_table which is derived from the
+ stanard ELF linker hash table. We use this as a place to attach the other
+ hash table and some static information.
+
+ The second is the stub hash table which is derived from the base BFD
+ hash table. The stub hash table holds the information on the linker
+ stubs. */
+
+struct elf32_open8_stub_hash_entry
+{
+ /* Base hash table entry structure. */
+ struct bfd_hash_entry bh_root;
+
+ /* Offset within stub_sec of the beginning of this stub. */
+ bfd_vma stub_offset;
+
+ /* Given the symbol's value and its section we can determine its final
+ value when building the stubs (so the stub knows where to jump). */
+ bfd_vma target_value;
+
+ /* This way we could mark stubs to be no longer necessary. */
+ bfd_boolean is_actually_needed;
+};
+
+struct elf32_open8_link_hash_table
+{
+ /* The main hash table. */
+ struct elf_link_hash_table etab;
+
+ /* The stub hash table. */
+ struct bfd_hash_table bstab;
+
+ bfd_boolean no_stubs;
+
+ /* Linker stub bfd. */
+ bfd *stub_bfd;
+
+ /* The stub section. */
+ asection *stub_sec;
+
+ /* Usually 0, unless we are generating code for a bootloader. Will
+ be initialized by elf32_open8_size_stubs to the vma offset of the
+ output section associated with the stub section. */
+ bfd_vma vector_base;
+
+ /* Assorted information used by elf32_open8_size_stubs. */
+ unsigned int bfd_count;
+ int top_index;
+ asection ** input_list;
+ Elf_Internal_Sym ** all_local_syms;
+
+ /* Tables for mapping vma beyond the 128k boundary to the address of the
+ corresponding stub. (AMT)
+ "amt_max_entry_cnt" reflects the number of entries that memory is allocated
+ for in the "amt_stub_offsets" and "amt_destination_addr" arrays.
+ "amt_entry_cnt" informs how many of these entries actually contain
+ useful data. */
+ unsigned int amt_entry_cnt;
+ unsigned int amt_max_entry_cnt;
+ bfd_vma * amt_stub_offsets;
+ bfd_vma * amt_destination_addr;
+};
+
+/* Various hash macros and functions. */
+/* PR 3874: Check that we have an OPEN8 style hash table before
+ using it. */
+#define open8_link_hash_table(p) \
+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
+ == OPEN8_ELF_DATA \
+ ? ((struct elf32_open8_link_hash_table *) ((p)->hash)) \
+ : NULL)
+
+#define open8_stub_hash_entry(ent) \
+ ((struct elf32_open8_stub_hash_entry *)(ent))
+
+#define open8_stub_hash_lookup(table, string, create, copy) \
+ ((struct elf32_open8_stub_hash_entry *) \
+ bfd_hash_lookup ((table), (string), (create), (copy)))
+
+static reloc_howto_type elf_open8_howto_table[] =
+ {
+ HOWTO (R_OPEN8_NONE,
+ 0,
+ 2,
+ 32,
+ FALSE,
+ 0,
+ complain_overflow_bitfield,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_NONE",
+ FALSE,
+ 0,
+ 0,
+ FALSE),
+
+ HOWTO (R_OPEN8_32,
+ 0,
+ 2,
+ 32,
+ FALSE,
+ 0,
+ complain_overflow_bitfield,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_32",
+ FALSE,
+ 0xffffffff,
+ 0xffffffff,
+ FALSE),
+
+ /* An 8 bit PC relative relocation. */
+ HOWTO (R_OPEN8_PCREL,
+ 0,
+ 1,
+ 8,
+ TRUE,
+ 0,
+ complain_overflow_bitfield,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_PCREL",
+ FALSE,
+ 0xff,
+ 0xff,
+ TRUE),
+
+ /* A 16 bit absolute relocation. */
+ HOWTO (R_OPEN8_16,
+ 0,
+ 1,
+ 16,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_16",
+ FALSE,
+ 0xffff,
+ 0xffff,
+ FALSE),
+
+ /* A low 8 bit absolute relocation of 16 bit address.
+ For LDI command. */
+ HOWTO (R_OPEN8_LO8_LDI,
+ 0,
+ 1,
+ 8,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_LO8_LDI",
+ FALSE,
+ 0xffff,
+ 0xffff,
+ FALSE),
+
+ /* A high 8 bit absolute relocation of 16 bit address.
+ For LDI command. */
+ HOWTO (R_OPEN8_HI8_LDI,
+ 8,
+ 1,
+ 8,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_HI8_LDI",
+ FALSE,
+ 0xffff,
+ 0xffff,
+ FALSE),
+ /* A negative low 8 bit absolute relocation of 16 bit address.
+ For LDI command. */
+ HOWTO (R_OPEN8_LO8_LDI_NEG,
+ 0,
+ 1,
+ 8,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_LO8_LDI_NEG",
+ FALSE,
+ 0xffff,
+ 0xffff,
+ FALSE),
+
+ /* A negative high 8 bit absolute relocation of 16 bit address.
+ For LDI command. */
+ HOWTO (R_OPEN8_HI8_LDI_NEG,
+ 8,
+ 1,
+ 8,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_HI8_LDI_NEG",
+ FALSE,
+ 0xffff,
+ 0xffff,
+ FALSE),
+
+ /* Relocation for JSR and JMP in OPEN8. */
+ HOWTO (R_OPEN8_CALL,
+ 0,
+ 2,
+ 16,
+ FALSE,
+ 0,
+ complain_overflow_dont,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_CALL",
+ FALSE,
+ 0xffffffff,
+ 0xffffffff,
+ FALSE),
+
+ /* 8 bit offset. */
+ HOWTO (R_OPEN8_8,
+ 0,
+ 0,
+ 8,
+ FALSE,
+ 0,
+ complain_overflow_bitfield,
+ bfd_elf_generic_reloc,
+ "R_OPEN8_8",
+ FALSE,
+ 0x000000ff,
+ 0x000000ff,
+ FALSE),
+ };
+
+/* Map BFD reloc types to OPEN8 ELF reloc types. */
+
+struct open8_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_val;
+ unsigned int elf_reloc_val;
+};
+
+static const struct open8_reloc_map open8_reloc_map[] =
+ {
+ { BFD_RELOC_NONE, R_OPEN8_NONE },
+ { BFD_RELOC_32, R_OPEN8_32 },
+ { BFD_RELOC_OPEN8_PCREL, R_OPEN8_PCREL },
+ { BFD_RELOC_16, R_OPEN8_16 },
+ { BFD_RELOC_OPEN8_LO8_LDI, R_OPEN8_LO8_LDI},
+ { BFD_RELOC_OPEN8_HI8_LDI, R_OPEN8_HI8_LDI },
+ { BFD_RELOC_OPEN8_LO8_LDI_NEG, R_OPEN8_LO8_LDI_NEG },
+ { BFD_RELOC_OPEN8_HI8_LDI_NEG, R_OPEN8_HI8_LDI_NEG },
+ { BFD_RELOC_OPEN8_CALL, R_OPEN8_CALL },
+ { BFD_RELOC_8, R_OPEN8_8 }
+ };
+
+/* Meant to be filled one day with the wrap around address for the
+ specific device. I.e., should get the value 0x4000 for 16k devices,
+ 0x8000 for 32k devices and so on.
+
+ We initialize it here with a value of 0x1000000 resulting in
+ that we will never suggest a wrap-around jump during relaxation.
+ The logic of the source code later on assumes that in
+ open8_pc_wrap_around one single bit is set. */
+static bfd_vma open8_pc_wrap_around = 0x10000000;
+
+/* If this variable holds a value different from zero, the linker relaxation
+ machine will try to optimize call/ret sequences by a single jump
+ instruction. This option could be switched off by a linker switch. */
+static int open8_replace_call_ret_sequences = 1;
+
+/* Initialize an entry in the stub hash table. */
+
+static struct bfd_hash_entry *
+stub_hash_newfunc (struct bfd_hash_entry *entry,
+ struct bfd_hash_table *table,
+ const char *string)
+{
+ /* Allocate the structure if it has not already been allocated by a
+ subclass. */
+ if (entry == NULL)
+ {
+ entry = bfd_hash_allocate (table,
+ sizeof (struct elf32_open8_stub_hash_entry));
+ if (entry == NULL)
+ return entry;
+ }
+
+ /* Call the allocation method of the superclass. */
+ entry = bfd_hash_newfunc (entry, table, string);
+ if (entry != NULL)
+ {
+ struct elf32_open8_stub_hash_entry *hsh;
+
+ /* Initialize the local fields. */
+ hsh = open8_stub_hash_entry (entry);
+ hsh->stub_offset = 0;
+ hsh->target_value = 0;
+ }
+
+ return entry;
+}
+
+/* This function is just a straight passthrough to the real
+ function in linker.c. Its purpose is so that its address
+ can be compared inside the open8_link_hash_table macro. */
+
+static struct bfd_hash_entry *
+elf32_open8_link_hash_newfunc (struct bfd_hash_entry * entry,
+ struct bfd_hash_table * table,
+ const char * string)
+{
+ return _bfd_elf_link_hash_newfunc (entry, table, string);
+}
+
+/* Create the derived linker hash table. The OPEN8 ELF port uses the derived
+ hash table to keep information specific to the OPEN8 ELF linker (without
+ using static variables). */
+
+static struct bfd_link_hash_table *
+elf32_open8_link_hash_table_create (bfd *abfd)
+{
+ struct elf32_open8_link_hash_table *htab;
+ bfd_size_type amt = sizeof (*htab);
+
+ htab = bfd_malloc (amt);
+ if (htab == NULL)
+ return NULL;
+
+ if (!_bfd_elf_link_hash_table_init (&htab->etab, abfd,
+ elf32_open8_link_hash_newfunc,
+ sizeof (struct elf_link_hash_entry),
+ OPEN8_ELF_DATA))
+ {
+ free (htab);
+ return NULL;
+ }
+
+ /* Init the stub hash table too. */
+ if (!bfd_hash_table_init (&htab->bstab, stub_hash_newfunc,
+ sizeof (struct elf32_open8_stub_hash_entry)))
+ return NULL;
+
+ htab->stub_bfd = NULL;
+ htab->stub_sec = NULL;
+
+ /* Initialize the address mapping table. */
+ htab->amt_stub_offsets = NULL;
+ htab->amt_destination_addr = NULL;
+ htab->amt_entry_cnt = 0;
+ htab->amt_max_entry_cnt = 0;
+
+ return &htab->etab.root;
+}
+
+/* Free the derived linker hash table. */
+
+static void
+elf32_open8_link_hash_table_free (struct bfd_link_hash_table *btab)
+{
+ struct elf32_open8_link_hash_table *htab
+ = (struct elf32_open8_link_hash_table *) btab;
+
+ /* Free the address mapping table. */
+ if (htab->amt_stub_offsets != NULL)
+ free (htab->amt_stub_offsets);
+ if (htab->amt_destination_addr != NULL)
+ free (htab->amt_destination_addr);
+
+ bfd_hash_table_free (&htab->bstab);
+ _bfd_generic_link_hash_table_free (btab);
+}
+
+/* Calculates the effective distance of a pc relative jump/call. */
+#if 0
+static int
+open8_relative_distance_considering_wrap_around (unsigned int distance)
+{
+ unsigned int wrap_around_mask = open8_pc_wrap_around - 1;
+ int dist_with_wrap_around = distance & wrap_around_mask;
+
+ if (dist_with_wrap_around > ((int) (open8_pc_wrap_around >> 1)))
+ dist_with_wrap_around -= open8_pc_wrap_around;
+
+ return dist_with_wrap_around;
+}
+#endif
+
+static reloc_howto_type *
+bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
+{
+ unsigned int i;
+
+ for (i = 0;
+ i < sizeof (open8_reloc_map) / sizeof (struct open8_reloc_map);
+ i++)
+ if (open8_reloc_map[i].bfd_reloc_val == code)
+ return &elf_open8_howto_table[open8_reloc_map[i].elf_reloc_val];
+
+ return NULL;
+}
+
+static reloc_howto_type *
+bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ const char *r_name)
+{
+ unsigned int i;
+
+ for (i = 0;
+ i < sizeof (elf_open8_howto_table) / sizeof (elf_open8_howto_table[0]);
+ i++)
+ if (elf_open8_howto_table[i].name != NULL
+ && strcasecmp (elf_open8_howto_table[i].name, r_name) == 0)
+ return &elf_open8_howto_table[i];
+
+ return NULL;
+}
+
+/* Set the howto pointer for an OPEN8 ELF reloc. */
+
+static void
+open8_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *cache_ptr,
+ Elf_Internal_Rela *dst)
+{
+ unsigned int r_type;
+
+ r_type = ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (r_type < (unsigned int) R_OPEN8_max);
+ cache_ptr->howto = &elf_open8_howto_table[r_type];
+}
+
+static bfd_boolean
+open8_stub_is_required_for_16_bit_reloc (bfd_vma relocation)
+{
+ return (relocation >= 0x020000);
+}
+
+/* Perform a single relocation. By default we use the standard BFD
+ routines, but a few relocs, we have to do them ourselves. */
+
+static bfd_reloc_status_type
+open8_final_link_relocate (reloc_howto_type * howto,
+ bfd * input_bfd,
+ asection * input_section,
+ bfd_byte * contents,
+ Elf_Internal_Rela * rel,
+ bfd_vma relocation)
+{
+ bfd_reloc_status_type r = bfd_reloc_ok;
+ bfd_vma x;
+ bfd_signed_vma srel;
+ bfd_signed_vma reloc_addr;
+
+ /* Absolute addr of the reloc in the final excecutable. */
+ reloc_addr = rel->r_offset + input_section->output_section->vma
+ + input_section->output_offset;
+
+ switch (howto->type)
+ {
+ case R_OPEN8_PCREL:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation;
+ srel += rel->r_addend;
+
+ if (srel > ((1 << 8) - 1) || (srel < - (1 << 7)))
+ return bfd_reloc_overflow;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xff00) | (srel & 0xff);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
+ case R_OPEN8_CALL:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ bfd_put_16 (input_bfd, srel, contents);
+ break;
+
+ case R_OPEN8_LO8_LDI:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xff00) | (srel & 0x0ff);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
+ case R_OPEN8_HI8_LDI:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xff00) | ((srel >> 4) & 0x0ff);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
+ case R_OPEN8_LO8_LDI_NEG:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ srel = -srel;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xff00) | (srel & 0x0ff);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
+ case R_OPEN8_HI8_LDI_NEG:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation + rel->r_addend;
+ srel = -srel;
+ x = bfd_get_16 (input_bfd, contents);
+ x = (x & 0xff00) | ((srel >> 4) & 0x0ff);
+ bfd_put_16 (input_bfd, x, contents);
+ break;
+
+ default:
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+ }
+
+ return r;
+}
+
+/* Relocate an OPEN8 ELF section. */
+
+static bfd_boolean
+elf32_open8_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ Elf_Internal_Rela *relocs,
+ Elf_Internal_Sym *local_syms,
+ asection **local_sections)
+{
+ Elf_Internal_Shdr * symtab_hdr;
+ struct elf_link_hash_entry ** sym_hashes;
+ Elf_Internal_Rela * rel;
+ Elf_Internal_Rela * relend;
+ struct elf32_open8_link_hash_table * htab = open8_link_hash_table (info);
+
+ if (htab == NULL)
+ return FALSE;
+
+ symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+ relend = relocs + input_section->reloc_count;
+
+ for (rel = relocs; rel < relend; rel ++)
+ {
+ reloc_howto_type * howto;
+ unsigned long r_symndx;
+ Elf_Internal_Sym * sym;
+ asection * sec;
+ struct elf_link_hash_entry * h;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+ const char * name;
+ int r_type;
+
+ r_type = ELF32_R_TYPE (rel->r_info);
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ howto = elf_open8_howto_table + r_type;
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections [r_symndx];
+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+
+ name = bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name);
+ name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
+ }
+ else
+ {
+ bfd_boolean unresolved_reloc, warned;
+
+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+ r_symndx, symtab_hdr, sym_hashes,
+ h, sec, relocation,
+ unresolved_reloc, warned);
+
+ name = h->root.root.string;
+ }
+
+ if (sec != NULL && elf_discarded_section (sec))
+ RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
+ rel, relend, howto, contents);
+
+ if (info->relocatable)
+ continue;
+
+ r = open8_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel, relocation);
+
+ if (r != bfd_reloc_ok)
+ {
+ const char * msg = (const char *) NULL;
+
+ switch (r)
+ {
+ case bfd_reloc_overflow:
+ r = info->callbacks->reloc_overflow
+ (info, (h ? &h->root : NULL),
+ name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset);
+ break;
+
+ case bfd_reloc_undefined:
+ r = info->callbacks->undefined_symbol
+ (info, name, input_bfd, input_section, rel->r_offset, TRUE);
+ break;
+
+ case bfd_reloc_outofrange:
+ msg = _("internal error: out of range error");
+ break;
+
+ case bfd_reloc_notsupported:
+ msg = _("internal error: unsupported relocation error");
+ break;
+
+ case bfd_reloc_dangerous:
+ msg = _("internal error: dangerous relocation");
+ break;
+
+ default:
+ msg = _("internal error: unknown error");
+ break;
+ }
+
+ if (msg)
+ r = info->callbacks->warning
+ (info, msg, name, input_bfd, input_section, rel->r_offset);
+
+ if (! r)
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+/* The final processing done just before writing out a OPEN8 ELF object
+ file. This gets the OPEN8 architecture right based on the machine
+ number. */
+
+static void
+bfd_elf_open8_final_write_processing (bfd *abfd,
+ bfd_boolean linker ATTRIBUTE_UNUSED)
+{
+ unsigned long val;
+
+ switch (bfd_get_mach (abfd))
+ {
+ default:
+ case bfd_mach_open8_1:
+ val = E_OPEN8_MACH_OPEN8_1;
+ break;
+ }
+
+ elf_elfheader (abfd)->e_machine = EM_OPEN8;
+ elf_elfheader (abfd)->e_flags &= ~ EF_OPEN8_MACH;
+ elf_elfheader (abfd)->e_flags |= val;
+ elf_elfheader (abfd)->e_flags |= EF_OPEN8_LINKRELAX_PREPARED;
+}
+
+/* Set the right machine number. */
+
+static bfd_boolean
+elf32_open8_object_p (bfd *abfd)
+{
+ unsigned int e_set = bfd_mach_open8_1;
+
+ if (elf_elfheader (abfd)->e_machine == EM_OPEN8)
+ {
+ int e_mach = elf_elfheader (abfd)->e_flags & EF_OPEN8_MACH;
+
+ switch (e_mach)
+ {
+ default:
+ case E_OPEN8_MACH_OPEN8_1:
+ e_set = bfd_mach_open8_1;
+ break;
+
+ }
+ }
+ return bfd_default_set_arch_mach (abfd, bfd_arch_open8,
+ e_set);
+}
+
+
+/* Delete some bytes from a section while changing the size of an instruction.
+ The parameter "addr" denotes the section-relative offset pointing just
+ behind the shrinked instruction. "addr+count" point at the first
+ byte just behind the original unshrinked instruction. */
+
+static bfd_boolean
+elf32_open8_relax_delete_bytes (bfd *abfd,
+ asection *sec,
+ bfd_vma addr,
+ int count)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ unsigned int sec_shndx;
+ bfd_byte *contents;
+ Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymbuf = NULL;
+ bfd_vma toaddr;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+ unsigned int symcount;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+ contents = elf_section_data (sec)->this_hdr.contents;
+
+ toaddr = sec->size;
+
+ irel = elf_section_data (sec)->relocs;
+ irelend = irel + sec->reloc_count;
+
+ /* Actually delete the bytes. */
+ if (toaddr - addr - count > 0)
+ memmove (contents + addr, contents + addr + count,
+ (size_t) (toaddr - addr - count));
+ sec->size -= count;
+
+ /* Adjust all the reloc addresses. */
+ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ {
+ bfd_vma old_reloc_address;
+
+ old_reloc_address = (sec->output_section->vma
+ + sec->output_offset + irel->r_offset);
+
+ /* Get the new reloc address. */
+ if ((irel->r_offset > addr
+ && irel->r_offset < toaddr))
+ {
+ if (debug_relax)
+ printf ("Relocation at address 0x%x needs to be moved.\n"
+ "Old section offset: 0x%x, New section offset: 0x%x \n",
+ (unsigned int) old_reloc_address,
+ (unsigned int) irel->r_offset,
+ (unsigned int) ((irel->r_offset) - count));
+
+ irel->r_offset -= count;
+ }
+
+ }
+
+ /* The reloc's own addresses are now ok. However, we need to readjust
+ the reloc's addend, i.e., the reloc's value if two conditions are met:
+ 1.) the reloc is relative to a symbol in this section that
+ is located in front of the shrinked instruction
+ 2.) symbol plus addend end up behind the shrinked instruction.
+
+ The most common case where this happens are relocs relative to
+ the section-start symbol.
+
+ This step needs to be done for all of the sections of the bfd. */
+
+ {
+ struct bfd_section *isec;
+
+ for (isec = abfd->sections; isec; isec = isec->next)
+ {
+ bfd_vma symval;
+ bfd_vma shrinked_insn_address;
+
+ shrinked_insn_address = (sec->output_section->vma
+ + sec->output_offset + addr - count);
+
+ irelend = elf_section_data (isec)->relocs + isec->reloc_count;
+ for (irel = elf_section_data (isec)->relocs;
+ irel < irelend;
+ irel++)
+ {
+ /* Read this BFD's local symbols if we haven't done
+ so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ return FALSE;
+ }
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = isym->st_value;
+ /* If the reloc is absolute, it will not have
+ a symbol or section associated with it. */
+ if (sym_sec == sec)
+ {
+ symval += sym_sec->output_section->vma
+ + sym_sec->output_offset;
+
+ if (debug_relax)
+ printf ("Checking if the relocation's "
+ "addend needs corrections.\n"
+ "Address of anchor symbol: 0x%x \n"
+ "Address of relocation target: 0x%x \n"
+ "Address of relaxed insn: 0x%x \n",
+ (unsigned int) symval,
+ (unsigned int) (symval + irel->r_addend),
+ (unsigned int) shrinked_insn_address);
+
+ if (symval <= shrinked_insn_address
+ && (symval + irel->r_addend) > shrinked_insn_address)
+ {
+ irel->r_addend -= count;
+
+ if (debug_relax)
+ printf ("Relocation's addend needed to be fixed \n");
+ }
+ }
+ /* else, reference symbol is absolute.
+ No adjustment needed. */
+ }
+ /* else, reference symbol is extern. No need for adjusting
+ the addend. */
+ }
+ }
+ }
+
+ /* Adjust the local symbols defined in this section. */
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ /* Fix PR 9841, there may be no local symbols. */
+ if (isym != NULL)
+ {
+ Elf_Internal_Sym *isymend;
+
+ isymend = isym + symtab_hdr->sh_info;
+ for (; isym < isymend; isym++)
+ {
+ if (isym->st_shndx == sec_shndx
+ && isym->st_value > addr
+ && isym->st_value < toaddr)
+ isym->st_value -= count;
+ }
+ }
+
+ /* Now adjust the global symbols defined in this section. */
+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type == bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && sym_hash->root.u.def.value > addr
+ && sym_hash->root.u.def.value < toaddr)
+ {
+ sym_hash->root.u.def.value -= count;
+ }
+ }
+
+ return TRUE;
+}
+
+/* This function handles relaxing for the open8.
+ Many important relaxing opportunities within functions are already
+ realized by the compiler itself.
+ Here we try to replace branch followed by jump with a reverse branch.
+ As well we now optimize sequences of
+ - call/rcall function
+ - ret
+ to yield
+ - jmp/ function
+ - ret
+ . In case that within a sequence
+ - jmp/rjmp label
+ - ret
+ the ret could no longer be reached it is optimized away. In order
+ to check if the ret is no longer needed, it is checked that the ret's address
+ is not the target of a branch or jump within the same section, it is checked
+ that there is no skip instruction before the jmp/rjmp and that there
+ is no local or global label placed at the address of the ret.
+
+ We refrain from relaxing within sections ".vectors" and
+ ".jumptables" in order to maintain the position of the instructions.
+ There, however, we substitute jmp/call by a sequence rjmp,nop/rcall,nop
+ if possible. (In the future, one could possibly use the space of the nop
+ for the first instruction of the irq service function.)
+
+*/
+
+static bfd_boolean
+elf32_open8_relax_section (bfd *abfd,
+ asection *sec,
+ struct bfd_link_info *link_info,
+ bfd_boolean *again)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ Elf_Internal_Rela *internal_relocs;
+ Elf_Internal_Rela *irel, *irelend;
+ bfd_byte *contents = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+ struct elf32_open8_link_hash_table *htab;
+
+ if (link_info->relocatable)
+ (*link_info->callbacks->einfo)
+ (_("%P%F: --relax and -r may not be used together\n"));
+
+/* TODO - MAJOR REWORK NEEDED HERE!!!
+ This code is AVR relaxation, need open8 version. */
+ return FALSE;
+
+ htab = open8_link_hash_table (link_info);
+ if (htab == NULL)
+ return FALSE;
+
+ /* Assume nothing changes. */
+ *again = FALSE;
+
+ if ((!htab->no_stubs) && (sec == htab->stub_sec))
+ {
+ /* We are just relaxing the stub section.
+ Let's calculate the size needed again. */
+ bfd_size_type last_estimated_stub_section_size = htab->stub_sec->size;
+
+ if (debug_relax)
+ printf ("Relaxing the stub section. Size prior to this pass: %i\n",
+ (int) last_estimated_stub_section_size);
+
+ elf32_open8_size_stubs (htab->stub_sec->output_section->owner,
+ link_info, FALSE);
+
+ /* Check if the number of trampolines changed. */
+ if (last_estimated_stub_section_size != htab->stub_sec->size)
+ *again = TRUE;
+
+ if (debug_relax)
+ printf ("Size of stub section after this pass: %i\n",
+ (int) htab->stub_sec->size);
+
+ return TRUE;
+ }
+
+ /* We don't have to do anything for a relocatable link, if
+ this section does not have relocs, or if this is not a
+ code section. */
+ if (link_info->relocatable
+ || (sec->flags & SEC_RELOC) == 0
+ || sec->reloc_count == 0
+ || (sec->flags & SEC_CODE) == 0)
+ return TRUE;
+
+ /* Check if the object file to relax uses internal symbols so that we
+ could fix up the relocations. */
+ if (!(elf_elfheader (abfd)->e_flags & EF_OPEN8_LINKRELAX_PREPARED))
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+
+ /* Get a copy of the native relocations. */
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (abfd, sec, NULL, NULL, link_info->keep_memory));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ /* Walk through the relocs looking for relaxing opportunities. */
+ irelend = internal_relocs + sec->reloc_count;
+ for (irel = internal_relocs; irel < irelend; irel++)
+ {
+ bfd_vma symval;
+
+ if ( ELF32_R_TYPE (irel->r_info) != R_OPEN8_PCREL
+ && ELF32_R_TYPE (irel->r_info) != R_OPEN8_CALL)
+ continue;
+
+ /* Get the section contents if we haven't done so already. */
+ if (contents == NULL)
+ {
+ /* Get cached copy if it exists. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ else
+ {
+ /* Go get them off disk. */
+ if (! bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+ }
+ }
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = isym->st_value;
+ /* If the reloc is absolute, it will not have
+ a symbol or section associated with it. */
+ if (sym_sec)
+ symval += sym_sec->output_section->vma
+ + sym_sec->output_offset;
+ }
+ else
+ {
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it--it will be caught by the
+ regular reloc processing. */
+ continue;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+
+ /* For simplicity of coding, we are going to modify the section
+ contents, the section relocs, and the BFD symbol table. We
+ must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
+ switch (ELF32_R_TYPE (irel->r_info))
+ {
+
+ default:
+ {
+ unsigned char code_msb;
+ unsigned char code_lsb;
+ bfd_vma dot;
+
+ code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1);
+ code_lsb = bfd_get_8 (abfd, contents + irel->r_offset + 0);
+
+ /* Get the address of this instruction. */
+ dot = (sec->output_section->vma
+ + sec->output_offset + irel->r_offset);
+
+ /* Here we look for rcall/ret or call/ret sequences that could be
+ safely replaced by rjmp/ret or jmp/ret. */
+ if (((code_msb & 0xf0) == 0xd0)
+ && open8_replace_call_ret_sequences)
+ {
+ /* This insn is a rcall. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+
+ if (irel->r_offset + 3 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 3);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 2);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We now convert the rcall insn
+ into a rjmp instruction. */
+ code_msb &= 0xef;
+ bfd_put_8 (abfd, code_msb, contents + irel->r_offset + 1);
+ if (debug_relax)
+ printf ("converted rcall/ret sequence at address 0x%x"
+ " into rjmp/ret sequence. Section is %s\n\n",
+ (int) dot, sec->name);
+ *again = TRUE;
+ break;
+ }
+ }
+ else if ((0x94 == (code_msb & 0xfe))
+ && (0x0e == (code_lsb & 0x0e))
+ && open8_replace_call_ret_sequences)
+ {
+ /* This insn is a call. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+
+ if (irel->r_offset + 5 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 5);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset + 4);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We now convert the call insn
+ into a jmp instruction. */
+
+ code_lsb &= 0xfd;
+ bfd_put_8 (abfd, code_lsb, contents + irel->r_offset);
+ if (debug_relax)
+ printf ("converted call/ret sequence at address 0x%x"
+ " into jmp/ret sequence. Section is %s\n\n",
+ (int) dot, sec->name);
+ *again = TRUE;
+ break;
+ }
+ }
+ else if ((0xc0 == (code_msb & 0xf0))
+ || ((0x94 == (code_msb & 0xfe))
+ && (0x0c == (code_lsb & 0x0e))))
+ {
+ /* This insn is a rjmp or a jmp. */
+ unsigned char next_insn_msb = 0;
+ unsigned char next_insn_lsb = 0;
+ int insn_size;
+
+ if (0xc0 == (code_msb & 0xf0))
+ insn_size = 2;
+ else
+ insn_size = 4;
+
+ if (irel->r_offset + insn_size + 1 < sec->size)
+ {
+ next_insn_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset
+ + insn_size + 1);
+ next_insn_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset
+ + insn_size);
+ }
+
+ if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
+ {
+ /* The next insn is a ret. We possibly could delete
+ this ret. First we need to check for preceeding
+ sbis/sbic/sbrs or cpse "skip" instructions. */
+
+ int there_is_preceeding_non_skip_insn = 1;
+ bfd_vma address_of_ret;
+
+ address_of_ret = dot + insn_size;
+
+ if (debug_relax && (insn_size == 2))
+ printf ("found rjmp / ret sequence at address 0x%x\n",
+ (int) dot);
+ if (debug_relax && (insn_size == 4))
+ printf ("found jmp / ret sequence at address 0x%x\n",
+ (int) dot);
+
+ /* We have to make sure that there is a preceeding insn. */
+ if (irel->r_offset >= 2)
+ {
+ unsigned char preceeding_msb;
+ unsigned char preceeding_lsb;
+ preceeding_msb =
+ bfd_get_8 (abfd, contents + irel->r_offset - 1);
+ preceeding_lsb =
+ bfd_get_8 (abfd, contents + irel->r_offset - 2);
+
+ /* sbic. */
+ if (0x99 == preceeding_msb)
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbis. */
+ if (0x9b == preceeding_msb)
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbrc. */
+ if ((0xfc == (preceeding_msb & 0xfe)
+ && (0x00 == (preceeding_lsb & 0x08))))
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* sbrs. */
+ if ((0xfe == (preceeding_msb & 0xfe)
+ && (0x00 == (preceeding_lsb & 0x08))))
+ there_is_preceeding_non_skip_insn = 0;
+
+ /* cpse. */
+ if (0x10 == (preceeding_msb & 0xfc))
+ there_is_preceeding_non_skip_insn = 0;
+
+ if (there_is_preceeding_non_skip_insn == 0)
+ if (debug_relax)
+ printf ("preceeding skip insn prevents deletion of"
+ " ret insn at addr 0x%x in section %s\n",
+ (int) dot + 2, sec->name);
+ }
+ else
+ {
+ /* There is no previous instruction. */
+ there_is_preceeding_non_skip_insn = 0;
+ }
+
+ if (there_is_preceeding_non_skip_insn)
+ {
+ /* We now only have to make sure that there is no
+ local label defined at the address of the ret
+ instruction and that there is no local relocation
+ in this section pointing to the ret. */
+
+ int deleting_ret_is_safe = 1;
+ unsigned int section_offset_of_ret_insn =
+ irel->r_offset + insn_size;
+ Elf_Internal_Sym *isym, *isymend;
+ unsigned int sec_shndx;
+
+ sec_shndx =
+ _bfd_elf_section_from_bfd_section (abfd, sec);
+
+ /* Check for local symbols. */
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ isymend = isym + symtab_hdr->sh_info;
+ /* PR 6019: There may not be any local symbols. */
+ for (; isym != NULL && isym < isymend; isym++)
+ {
+ if (isym->st_value == section_offset_of_ret_insn
+ && isym->st_shndx == sec_shndx)
+ {
+ deleting_ret_is_safe = 0;
+ if (debug_relax)
+ printf ("local label prevents deletion of"
+ "ret insn at address 0x%x\n",
+ (int) dot + insn_size);
+ }
+ }
+
+ /* Now check for global symbols. */
+ {
+ int symcount;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+
+ symcount = (symtab_hdr->sh_size
+ / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash =
+ *sym_hashes;
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type ==
+ bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && (sym_hash->root.u.def.value
+ == section_offset_of_ret_insn))
+ {
+ deleting_ret_is_safe = 0;
+ if (debug_relax)
+ printf ("global label prevents deletion of "
+ "ret insn at address 0x%x\n",
+ (int) dot + insn_size);
+ }
+ }
+ }
+ /* Now we check for relocations pointing to ret. */
+ {
+ Elf_Internal_Rela *rel;
+ Elf_Internal_Rela *relend;
+
+ relend = elf_section_data (sec)->relocs
+ + sec->reloc_count;
+
+ for (rel = elf_section_data (sec)->relocs;
+ rel < relend; rel++)
+ {
+ bfd_vma reloc_target = 0;
+
+ /* Read this BFD's local symbols if we haven't
+ done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *)
+ symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms
+ (abfd,
+ symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ break;
+ }
+
+ /* Get the value of the symbol referred to
+ by the reloc. */
+ if (ELF32_R_SYM (rel->r_info)
+ < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ asection *sym_sec;
+
+ isym = isymbuf
+ + ELF32_R_SYM (rel->r_info);
+ sym_sec = bfd_section_from_elf_index
+ (abfd, isym->st_shndx);
+ symval = isym->st_value;
+
+ /* If the reloc is absolute, it will not
+ have a symbol or section associated
+ with it. */
+
+ if (sym_sec)
+ {
+ symval +=
+ sym_sec->output_section->vma
+ + sym_sec->output_offset;
+ reloc_target = symval + rel->r_addend;
+ }
+ else
+ {
+ reloc_target = symval + rel->r_addend;
+ /* Reference symbol is absolute. */
+ }
+ }
+ /* else, reference symbol is extern. */
+
+ if (address_of_ret == reloc_target)
+ {
+ deleting_ret_is_safe = 0;
+ if (debug_relax)
+ printf ("ret from "
+ "rjmp/jmp ret sequence at address"
+ " 0x%x could not be deleted. ret"
+ " is target of a relocation.\n",
+ (int) address_of_ret);
+ }
+ }
+ }
+
+ if (deleting_ret_is_safe)
+ {
+ if (debug_relax)
+ printf ("unreachable ret instruction "
+ "at address 0x%x deleted.\n",
+ (int) dot + insn_size);
+
+ /* Delete two bytes of data. */
+ if (!elf32_open8_relax_delete_bytes (abfd,
+ sec,
+ irel->r_offset
+ + insn_size,
+ 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax
+ again. Note that this is not required, and it
+ may be slow. */
+ *again = TRUE;
+ break;
+ }
+ }
+
+ }
+ }
+ break;
+ }
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ {
+ if (! link_info->keep_memory)
+ free (contents);
+ else
+ {
+ /* Cache the section contents for elf_link_input_bfd. */
+ elf_section_data (sec)->this_hdr.contents = contents;
+ }
+ }
+
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return TRUE;
+
+ error_return:
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return FALSE;
+}
+
+/* This is a version of bfd_generic_get_relocated_section_contents
+ which uses elf32_open8_relocate_section.
+
+ For open8 it's essentially a cut and paste taken from the H8300 port.
+ The author of the relaxation support patch for open8 had absolutely no
+ clue what is happening here but found out that this part of the code
+ seems to be important. */
+
+static bfd_byte *
+elf32_open8_get_relocated_section_contents (bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ asection *input_section = link_order->u.indirect.section;
+ bfd *input_bfd = input_section->owner;
+ asection **sections = NULL;
+ Elf_Internal_Rela *internal_relocs = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* We only need to handle the case of relaxing, or of having a
+ particular set of section contents, specially. */
+ if (relocatable
+ || elf_section_data (input_section)->this_hdr.contents == NULL)
+ return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
+ link_order, data,
+ relocatable,
+ symbols);
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+
+ memcpy (data, elf_section_data (input_section)->this_hdr.contents,
+ (size_t) input_section->size);
+
+ if ((input_section->flags & SEC_RELOC) != 0
+ && input_section->reloc_count > 0)
+ {
+ asection **secpp;
+ Elf_Internal_Sym *isym, *isymend;
+ bfd_size_type amt;
+
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (input_bfd, input_section, NULL, NULL, FALSE));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ if (symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ amt = symtab_hdr->sh_info;
+ amt *= sizeof (asection *);
+ sections = bfd_malloc (amt);
+ if (sections == NULL && amt != 0)
+ goto error_return;
+
+ isymend = isymbuf + symtab_hdr->sh_info;
+ for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
+ {
+ asection *isec;
+
+ if (isym->st_shndx == SHN_UNDEF)
+ isec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ isec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ isec = bfd_com_section_ptr;
+ else
+ isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
+
+ *secpp = isec;
+ }
+
+ if (! elf32_open8_relocate_section (output_bfd, link_info, input_bfd,
+ input_section, data, internal_relocs,
+ isymbuf, sections))
+ goto error_return;
+
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ }
+
+ return data;
+
+ error_return:
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (internal_relocs != NULL
+ && elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ return NULL;
+}
+
+
+/* Determines the hash entry name for a particular reloc. It consists of
+ the identifier of the symbol section and the added reloc addend and
+ symbol offset relative to the section the symbol is attached to. */
+
+static char *
+open8_stub_name (const asection *symbol_section,
+ const bfd_vma symbol_offset,
+ const Elf_Internal_Rela *rela)
+{
+ char *stub_name;
+ bfd_size_type len;
+
+ len = 8 + 1 + 8 + 1 + 1;
+ stub_name = bfd_malloc (len);
+
+ sprintf (stub_name, "%08x+%08x",
+ symbol_section->id & 0xffffffff,
+ (unsigned int) ((rela->r_addend & 0xffffffff) + symbol_offset));
+
+ return stub_name;
+}
+
+
+/* Add a new stub entry to the stub hash. Not all fields of the new
+ stub entry are initialised. */
+
+static struct elf32_open8_stub_hash_entry *
+open8_add_stub (const char *stub_name,
+ struct elf32_open8_link_hash_table *htab)
+{
+ struct elf32_open8_stub_hash_entry *hsh;
+
+ /* Enter this entry into the linker stub hash table. */
+ hsh = open8_stub_hash_lookup (&htab->bstab, stub_name, TRUE, FALSE);
+
+ if (hsh == NULL)
+ {
+ (*_bfd_error_handler) (_("%B: cannot create stub entry %s"),
+ NULL, stub_name);
+ return NULL;
+ }
+
+ hsh->stub_offset = 0;
+ return hsh;
+}
+
+/* We assume that there is already space allocated for the stub section
+ contents and that before building the stubs the section size is
+ initialized to 0. We assume that within the stub hash table entry,
+ the absolute position of the jmp target has been written in the
+ target_value field. We write here the offset of the generated jmp insn
+ relative to the trampoline section start to the stub_offset entry in
+ the stub hash table entry. */
+
+static bfd_boolean
+open8_build_one_stub (struct bfd_hash_entry *bh, void *in_arg)
+{
+ struct elf32_open8_stub_hash_entry *hsh;
+ struct bfd_link_info *info;
+ struct elf32_open8_link_hash_table *htab;
+ bfd *stub_bfd;
+ bfd_byte *loc;
+ bfd_vma target;
+ bfd_vma starget;
+
+ /* Basic opcode. */
+ bfd_vma jmp_insn = 0x0000940c;
+
+ /* Massage our args to the form they really have. */
+ hsh = open8_stub_hash_entry (bh);
+
+ if (!hsh->is_actually_needed)
+ return TRUE;
+
+ info = (struct bfd_link_info *) in_arg;
+
+ htab = open8_link_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ target = hsh->target_value;
+
+ /* Make a note of the offset within the stubs for this entry. */
+ hsh->stub_offset = htab->stub_sec->size;
+ loc = htab->stub_sec->contents + hsh->stub_offset;
+
+ stub_bfd = htab->stub_sec->owner;
+
+ if (debug_stubs)
+ printf ("Building one Stub. Address: 0x%x, Offset: 0x%x\n",
+ (unsigned int) target,
+ (unsigned int) hsh->stub_offset);
+
+ /* We now have to add the information on the jump target to the bare
+ opcode bits already set in jmp_insn. */
+
+ /* Check for the alignment of the address. */
+ if (target & 1)
+ return FALSE;
+
+ starget = target >> 1;
+ jmp_insn |= ((starget & 0x10000) | ((starget << 3) & 0x1f00000)) >> 16;
+ bfd_put_16 (stub_bfd, jmp_insn, loc);
+ bfd_put_16 (stub_bfd, (bfd_vma) starget & 0xffff, loc + 2);
+
+ htab->stub_sec->size += 4;
+
+ /* Now add the entries in the address mapping table if there is still
+ space left. */
+ {
+ unsigned int nr;
+
+ nr = htab->amt_entry_cnt + 1;
+ if (nr <= htab->amt_max_entry_cnt)
+ {
+ htab->amt_entry_cnt = nr;
+
+ htab->amt_stub_offsets[nr - 1] = hsh->stub_offset;
+ htab->amt_destination_addr[nr - 1] = target;
+ }
+ }
+
+ return TRUE;
+}
+
+static bfd_boolean
+open8_mark_stub_not_to_be_necessary (struct bfd_hash_entry *bh,
+ void *in_arg ATTRIBUTE_UNUSED)
+{
+ struct elf32_open8_stub_hash_entry *hsh;
+
+ hsh = open8_stub_hash_entry (bh);
+ hsh->is_actually_needed = FALSE;
+
+ return TRUE;
+}
+
+static bfd_boolean
+open8_size_one_stub (struct bfd_hash_entry *bh, void *in_arg)
+{
+ struct elf32_open8_stub_hash_entry *hsh;
+ struct elf32_open8_link_hash_table *htab;
+ int size;
+
+ /* Massage our args to the form they really have. */
+ hsh = open8_stub_hash_entry (bh);
+ htab = in_arg;
+
+ if (hsh->is_actually_needed)
+ size = 4;
+ else
+ size = 0;
+
+ htab->stub_sec->size += size;
+ return TRUE;
+}
+
+void
+elf32_open8_setup_params (struct bfd_link_info *info,
+ bfd *open8_stub_bfd,
+ asection *open8_stub_section,
+ bfd_boolean no_stubs,
+ bfd_boolean deb_stubs,
+ bfd_boolean deb_relax,
+ bfd_vma pc_wrap_around,
+ bfd_boolean call_ret_replacement)
+{
+ struct elf32_open8_link_hash_table *htab = open8_link_hash_table (info);
+
+ if (htab == NULL)
+ return;
+ htab->stub_sec = open8_stub_section;
+ htab->stub_bfd = open8_stub_bfd;
+ htab->no_stubs = no_stubs;
+
+ debug_relax = deb_relax;
+ debug_stubs = deb_stubs;
+ open8_pc_wrap_around = pc_wrap_around;
+ open8_replace_call_ret_sequences = call_ret_replacement;
+}
+
+
+/* Set up various things so that we can make a list of input sections
+ for each output section included in the link. Returns -1 on error,
+ 0 when no stubs will be needed, and 1 on success. It also sets
+ information on the stubs bfd and the stub section in the info
+ struct. */
+
+int
+elf32_open8_setup_section_lists (bfd *output_bfd,
+ struct bfd_link_info *info)
+{
+ bfd *input_bfd;
+ unsigned int bfd_count;
+ int top_id, top_index;
+ asection *section;
+ asection **input_list, **list;
+ bfd_size_type amt;
+ struct elf32_open8_link_hash_table *htab = open8_link_hash_table (info);
+
+ if (htab == NULL || htab->no_stubs)
+ return 0;
+
+ /* Count the number of input BFDs and find the top input section id. */
+ for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
+ input_bfd != NULL;
+ input_bfd = input_bfd->link_next)
+ {
+ bfd_count += 1;
+ for (section = input_bfd->sections;
+ section != NULL;
+ section = section->next)
+ if (top_id < section->id)
+ top_id = section->id;
+ }
+
+ htab->bfd_count = bfd_count;
+
+ /* We can't use output_bfd->section_count here to find the top output
+ section index as some sections may have been removed, and
+ strip_excluded_output_sections doesn't renumber the indices. */
+ for (section = output_bfd->sections, top_index = 0;
+ section != NULL;
+ section = section->next)
+ if (top_index < section->index)
+ top_index = section->index;
+
+ htab->top_index = top_index;
+ amt = sizeof (asection *) * (top_index + 1);
+ input_list = bfd_malloc (amt);
+ htab->input_list = input_list;
+ if (input_list == NULL)
+ return -1;
+
+ /* For sections we aren't interested in, mark their entries with a
+ value we can check later. */
+ list = input_list + top_index;
+ do
+ *list = bfd_abs_section_ptr;
+ while (list-- != input_list);
+
+ for (section = output_bfd->sections;
+ section != NULL;
+ section = section->next)
+ if ((section->flags & SEC_CODE) != 0)
+ input_list[section->index] = NULL;
+
+ return 1;
+}
+
+
+/* Read in all local syms for all input bfds, and create hash entries
+ for export stubs if we are building a multi-subspace shared lib.
+ Returns -1 on error, 0 otherwise. */
+
+static int
+get_local_syms (bfd *input_bfd, struct bfd_link_info *info)
+{
+ unsigned int bfd_indx;
+ Elf_Internal_Sym *local_syms, **all_local_syms;
+ struct elf32_open8_link_hash_table *htab = open8_link_hash_table (info);
+ bfd_size_type amt;
+
+ if (htab == NULL)
+ return -1;
+
+ /* We want to read in symbol extension records only once. To do this
+ we need to read in the local symbols in parallel and save them for
+ later use; so hold pointers to the local symbols in an array. */
+ amt = sizeof (Elf_Internal_Sym *) * htab->bfd_count;
+ all_local_syms = bfd_zmalloc (amt);
+ htab->all_local_syms = all_local_syms;
+ if (all_local_syms == NULL)
+ return -1;
+
+ /* Walk over all the input BFDs, swapping in local symbols.
+ If we are creating a shared library, create hash entries for the
+ export stubs. */
+ for (bfd_indx = 0;
+ input_bfd != NULL;
+ input_bfd = input_bfd->link_next, bfd_indx++)
+ {
+ Elf_Internal_Shdr *symtab_hdr;
+
+ /* We'll need the symbol table in a second. */
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ if (symtab_hdr->sh_info == 0)
+ continue;
+
+ /* We need an array of the local symbols attached to the input bfd. */
+ local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (local_syms == NULL)
+ {
+ local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ /* Cache them for elf_link_input_bfd. */
+ symtab_hdr->contents = (unsigned char *) local_syms;
+ }
+ if (local_syms == NULL)
+ return -1;
+
+ all_local_syms[bfd_indx] = local_syms;
+ }
+
+ return 0;
+}
+
+#define ADD_DUMMY_STUBS_FOR_DEBUGGING 0
+
+bfd_boolean
+elf32_open8_size_stubs (bfd *output_bfd,
+ struct bfd_link_info *info,
+ bfd_boolean is_prealloc_run)
+{
+ struct elf32_open8_link_hash_table *htab;
+ int stub_changed = 0;
+
+ htab = open8_link_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ /* At this point we initialize htab->vector_base
+ To the start of the text output section. */
+ htab->vector_base = htab->stub_sec->output_section->vma;
+
+ if (get_local_syms (info->input_bfds, info))
+ {
+ if (htab->all_local_syms)
+ goto error_ret_free_local;
+ return FALSE;
+ }
+
+ if (ADD_DUMMY_STUBS_FOR_DEBUGGING)
+ {
+ struct elf32_open8_stub_hash_entry *test;
+
+ test = open8_add_stub ("Hugo",htab);
+ test->target_value = 0x123456;
+ test->stub_offset = 13;
+
+ test = open8_add_stub ("Hugo2",htab);
+ test->target_value = 0x84210;
+ test->stub_offset = 14;
+ }
+
+ while (1)
+ {
+ bfd *input_bfd;
+ unsigned int bfd_indx;
+
+ /* We will have to re-generate the stub hash table each time anything
+ in memory has changed. */
+
+ bfd_hash_traverse (&htab->bstab,
+ open8_mark_stub_not_to_be_necessary,
+ htab);
+ for (input_bfd = info->input_bfds, bfd_indx = 0;
+ input_bfd != NULL;
+ input_bfd = input_bfd->link_next, bfd_indx++)
+ {
+ Elf_Internal_Shdr *symtab_hdr;
+ asection *section;
+ Elf_Internal_Sym *local_syms;
+
+ /* We'll need the symbol table in a second. */
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ if (symtab_hdr->sh_info == 0)
+ continue;
+
+ local_syms = htab->all_local_syms[bfd_indx];
+
+ /* Walk over each section attached to the input bfd. */
+ for (section = input_bfd->sections;
+ section != NULL;
+ section = section->next)
+ {
+ Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
+
+ /* If there aren't any relocs, then there's nothing more
+ to do. */
+ if ((section->flags & SEC_RELOC) == 0
+ || section->reloc_count == 0)
+ continue;
+
+ /* If this section is a link-once section that will be
+ discarded, then don't create any stubs. */
+ if (section->output_section == NULL
+ || section->output_section->owner != output_bfd)
+ continue;
+
+ /* Get the relocs. */
+ internal_relocs = _bfd_elf_link_read_relocs (input_bfd,
+ section,
+ NULL,
+ NULL,
+ info->keep_memory);
+ if (internal_relocs == NULL)
+ goto error_ret_free_local;
+
+ /* Now examine each relocation. */
+ irela = internal_relocs;
+ irelaend = irela + section->reloc_count;
+ for (; irela < irelaend; irela++)
+ {
+ unsigned int r_type, r_indx;
+ struct elf32_open8_stub_hash_entry *hsh;
+ asection *sym_sec;
+ bfd_vma sym_value;
+ bfd_vma destination;
+ struct elf_link_hash_entry *hh;
+ char *stub_name;
+
+ r_type = ELF32_R_TYPE (irela->r_info);
+ r_indx = ELF32_R_SYM (irela->r_info);
+
+ /* Now determine the call target, its name, value,
+ section. */
+ sym_sec = NULL;
+ sym_value = 0;
+ destination = 0;
+ hh = NULL;
+ if (r_indx < symtab_hdr->sh_info)
+ {
+ /* It's a local symbol. */
+ Elf_Internal_Sym *sym;
+ Elf_Internal_Shdr *hdr;
+ unsigned int shndx;
+
+ sym = local_syms + r_indx;
+ if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
+ sym_value = sym->st_value;
+ shndx = sym->st_shndx;
+ if (shndx < elf_numsections (input_bfd))
+ {
+ hdr = elf_elfsections (input_bfd)[shndx];
+ sym_sec = hdr->bfd_section;
+ destination = (sym_value + irela->r_addend
+ + sym_sec->output_offset
+ + sym_sec->output_section->vma);
+ }
+ }
+ else
+ {
+ /* It's an external symbol. */
+ int e_indx;
+
+ e_indx = r_indx - symtab_hdr->sh_info;
+ hh = elf_sym_hashes (input_bfd)[e_indx];
+
+ while (hh->root.type == bfd_link_hash_indirect
+ || hh->root.type == bfd_link_hash_warning)
+ hh = (struct elf_link_hash_entry *)
+ (hh->root.u.i.link);
+
+ if (hh->root.type == bfd_link_hash_defined
+ || hh->root.type == bfd_link_hash_defweak)
+ {
+ sym_sec = hh->root.u.def.section;
+ sym_value = hh->root.u.def.value;
+ if (sym_sec->output_section != NULL)
+ destination = (sym_value + irela->r_addend
+ + sym_sec->output_offset
+ + sym_sec->output_section->vma);
+ }
+ else if (hh->root.type == bfd_link_hash_undefweak)
+ {
+ if (! info->shared)
+ continue;
+ }
+ else if (hh->root.type == bfd_link_hash_undefined)
+ {
+ if (! (info->unresolved_syms_in_objects == RM_IGNORE
+ && (ELF_ST_VISIBILITY (hh->other)
+ == STV_DEFAULT)))
+ continue;
+ }
+ else
+ {
+ bfd_set_error (bfd_error_bad_value);
+
+ error_ret_free_internal:
+ if (elf_section_data (section)->relocs == NULL)
+ free (internal_relocs);
+ goto error_ret_free_local;
+ }
+ }
+
+ if (! open8_stub_is_required_for_16_bit_reloc
+ (destination - htab->vector_base))
+ {
+ if (!is_prealloc_run)
+ /* We are having a reloc that does't need a stub. */
+ continue;
+
+ /* We don't right now know if a stub will be needed.
+ Let's rather be on the safe side. */
+ }
+
+ /* Get the name of this stub. */
+ stub_name = open8_stub_name (sym_sec, sym_value, irela);
+
+ if (!stub_name)
+ goto error_ret_free_internal;
+
+
+ hsh = open8_stub_hash_lookup (&htab->bstab,
+ stub_name,
+ FALSE, FALSE);
+ if (hsh != NULL)
+ {
+ /* The proper stub has already been created. Mark it
+ to be used and write the possibly changed destination
+ value. */
+ hsh->is_actually_needed = TRUE;
+ hsh->target_value = destination;
+ free (stub_name);
+ continue;
+ }
+
+ hsh = open8_add_stub (stub_name, htab);
+ if (hsh == NULL)
+ {
+ free (stub_name);
+ goto error_ret_free_internal;
+ }
+
+ hsh->is_actually_needed = TRUE;
+ hsh->target_value = destination;
+
+ if (debug_stubs)
+ printf ("Adding stub with destination 0x%x to the"
+ " hash table.\n", (unsigned int) destination);
+ if (debug_stubs)
+ printf ("(Pre-Alloc run: %i)\n", is_prealloc_run);
+
+ stub_changed = TRUE;
+ }
+
+ /* We're done with the internal relocs, free them. */
+ if (elf_section_data (section)->relocs == NULL)
+ free (internal_relocs);
+ }
+ }
+
+ /* Re-Calculate the number of needed stubs. */
+ htab->stub_sec->size = 0;
+ bfd_hash_traverse (&htab->bstab, open8_size_one_stub, htab);
+
+ if (!stub_changed)
+ break;
+
+ stub_changed = FALSE;
+ }
+
+ free (htab->all_local_syms);
+ return TRUE;
+
+ error_ret_free_local:
+ free (htab->all_local_syms);
+ return FALSE;
+}
+
+
+/* Build all the stubs associated with the current output file. The
+ stubs are kept in a hash table attached to the main linker hash
+ table. We also set up the `.plt' entries for statically linked PIC
+ functions here. This function is called via hppaelf_finish in the
+ linker. */
+
+bfd_boolean
+elf32_open8_build_stubs (struct bfd_link_info *info)
+{
+ asection *stub_sec;
+ struct bfd_hash_table *table;
+ struct elf32_open8_link_hash_table *htab;
+ bfd_size_type total_size = 0;
+
+ htab = open8_link_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ /* In case that there were several stub sections: */
+ for (stub_sec = htab->stub_bfd->sections;
+ stub_sec != NULL;
+ stub_sec = stub_sec->next)
+ {
+ bfd_size_type size;
+
+ /* Allocate memory to hold the linker stubs. */
+ size = stub_sec->size;
+ total_size += size;
+
+ stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
+ if (stub_sec->contents == NULL && size != 0)
+ return FALSE;
+ stub_sec->size = 0;
+ }
+
+ /* Allocate memory for the address mapping table. */
+ htab->amt_entry_cnt = 0;
+ htab->amt_max_entry_cnt = total_size / 4;
+ htab->amt_stub_offsets = bfd_malloc (sizeof (bfd_vma)
+ * htab->amt_max_entry_cnt);
+ htab->amt_destination_addr = bfd_malloc (sizeof (bfd_vma)
+ * htab->amt_max_entry_cnt);
+
+ if (debug_stubs)
+ printf ("Allocating %i entries in the AMT\n", htab->amt_max_entry_cnt);
+
+ /* Build the stubs as directed by the stub hash table. */
+ table = &htab->bstab;
+ bfd_hash_traverse (table, open8_build_one_stub, info);
+
+ if (debug_stubs)
+ printf ("Final Stub section Size: %i\n", (int) htab->stub_sec->size);
+
+ return TRUE;
+}
+
+#define ELF_ARCH bfd_arch_open8
+#define ELF_TARGET_ID OPEN8_ELF_DATA
+#define ELF_MACHINE_CODE EM_OPEN8
+#define ELF_MAXPAGESIZE 1
+
+#define TARGET_LITTLE_SYM bfd_elf32_open8_vec
+#define TARGET_LITTLE_NAME "elf32-open8"
+
+#define bfd_elf32_bfd_link_hash_table_create elf32_open8_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_free elf32_open8_link_hash_table_free
+
+#define elf_info_to_howto open8_info_to_howto_rela
+#define elf_info_to_howto_rel NULL
+#define elf_backend_relocate_section elf32_open8_relocate_section
+#define elf_backend_can_gc_sections 1
+#define elf_backend_rela_normal 1
+#define elf_backend_final_write_processing \
+ bfd_elf_open8_final_write_processing
+#define elf_backend_object_p elf32_open8_object_p
+
+#define bfd_elf32_bfd_relax_section elf32_open8_relax_section
+#define bfd_elf32_bfd_get_relocated_section_contents \
+ elf32_open8_get_relocated_section_contents
+
+#include "elf32-target.h"
diff --git bfd/elf32-open8.h bfd/elf32-open8.h
new file mode 100644
index 0000000..4736b49
--- /dev/null
+++ bfd/elf32-open8.h
@@ -0,0 +1,38 @@
+/* Open8-specific support for 32-bit ELF.
+ Copyright 2006, 2007, 2010, 2011 Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+
+/* These four functions will be called from the ld back-end. */
+
+extern void
+elf32_open8_setup_params (struct bfd_link_info *, bfd *, asection *,
+ bfd_boolean, bfd_boolean, bfd_boolean,
+ bfd_vma, bfd_boolean);
+
+extern int
+elf32_open8_setup_section_lists (bfd *, struct bfd_link_info *);
+
+extern bfd_boolean
+elf32_open8_size_stubs (bfd *, struct bfd_link_info *, bfd_boolean);
+
+extern bfd_boolean
+elf32_open8_build_stubs (struct bfd_link_info *);
diff --git bfd/libbfd.h bfd/libbfd.h
index bdfbdb2..b655b66 100644
--- bfd/libbfd.h
+++ bfd/libbfd.h
@@ -2178,6 +2178,12 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_IQ2000_OFFSET_16",
"BFD_RELOC_IQ2000_OFFSET_21",
"BFD_RELOC_IQ2000_UHI16",
+ "BFD_RELOC_OPEN8_PCREL",
+ "BFD_RELOC_OPEN8_LO8_LDI",
+ "BFD_RELOC_OPEN8_HI8_LDI",
+ "BFD_RELOC_OPEN8_LO8_LDI_NEG",
+ "BFD_RELOC_OPEN8_HI8_LDI_NEG",
+ "BFD_RELOC_OPEN8_CALL",
"BFD_RELOC_XTENSA_RTLD",
"BFD_RELOC_XTENSA_GLOB_DAT",
"BFD_RELOC_XTENSA_JMP_SLOT",
diff --git bfd/reloc.c bfd/reloc.c
index 2e2dccd..b079e08 100644
--- bfd/reloc.c
+++ bfd/reloc.c
@@ -5252,6 +5252,39 @@ ENUMDOC
IQ2000 Relocations.
ENUM
+ BFD_RELOC_OPEN8_PCREL
+ENUMDOC
+ This is a 8 bit reloc for the Open8 that stores 8 bit pc relative
+ signed short offset into relative branch instructions.
+ENUM
+ BFD_RELOC_OPEN8_LO8_LDI
+ENUMDOC
+ This is an 8 bit reloc for the Open8 that stores 8 bit value (usually
+ data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_OPEN8_HI8_LDI
+ENUMDOC
+ This is a 8 bit reloc for the Open8 that stores 8 bit value
+ (high 8 bits of data memory address) into 8 bit immediate value
+ of LDI insn.
+ENUM
+ BFD_RELOC_OPEN8_LO8_LDI_NEG
+ENUMDOC
+ This is an 8 bit reloc for the Open8 that stores a negated 8 bit value
+ (usually data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_OPEN8_HI8_LDI_NEG
+ENUMDOC
+ This is a 8 bit reloc for the Open8 that stores negated 8 bit value
+ (high 8 bits of data memory address) into 8 bit immediate value of
+ LDI insn.
+ENUM
+ BFD_RELOC_OPEN8_CALL
+ENUMDOC
+ This is a 16 bit reloc for the Open8 that stores targets of jumps
+ and calls.
+
+ENUM
BFD_RELOC_XTENSA_RTLD
ENUMDOC
Special Xtensa relocation used only by PLT entries in ELF shared
diff --git bfd/targets.c bfd/targets.c
index e491c93..ed63a23 100644
--- bfd/targets.c
+++ bfd/targets.c
@@ -648,6 +648,7 @@ extern const bfd_target bfd_elf32_ntradbigmips_vec;
extern const bfd_target bfd_elf32_ntradlittlemips_vec;
extern const bfd_target bfd_elf32_ntradbigmips_freebsd_vec;
extern const bfd_target bfd_elf32_ntradlittlemips_freebsd_vec;
+extern const bfd_target bfd_elf32_open8_vec;
extern const bfd_target bfd_elf32_openrisc_vec;
extern const bfd_target bfd_elf32_or32_big_vec;
extern const bfd_target bfd_elf32_pj_vec;
@@ -1002,6 +1003,7 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf32_ntradbigmips_freebsd_vec,
&bfd_elf32_ntradlittlemips_freebsd_vec,
#endif
+ &bfd_elf32_open8_vec,
&bfd_elf32_openrisc_vec,
&bfd_elf32_or32_big_vec,
&bfd_elf32_pj_vec,
diff --git binutils/ChangeLog binutils/ChangeLog
index 2ffd99b..d2d7d03 100644
--- binutils/ChangeLog
+++ binutils/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-30 Kirk Hays <khays@hayshaus.com>
+
+ * readelf.c: Add support for Open8 MCU
+ * testsuite/binutils-all/objdump.exp: Add support for Open8 MCU
+
2011-03-30 Catherine Moore <clm@codesourcery.com>
* addr2line.c (translate_addresses): Sign extend the pc
diff --git binutils/readelf.c binutils/readelf.c
index 9b4f237..b0e6a3c 100644
--- binutils/readelf.c
+++ binutils/readelf.c
@@ -129,6 +129,7 @@
#include "elf/moxie.h"
#include "elf/mt.h"
#include "elf/msp430.h"
+#include "elf/open8.h"
#include "elf/or32.h"
#include "elf/pj.h"
#include "elf/ppc.h"
@@ -581,6 +582,7 @@ guess_is_rela (unsigned int e_machine)
case EM_MSP430_OLD:
case EM_MT:
case EM_NIOS32:
+ case EM_OPEN8:
case EM_PPC64:
case EM_PPC:
case EM_RX:
@@ -1070,6 +1072,10 @@ dump_relocations (FILE * file,
rtype = elf_msp430_reloc_type (type);
break;
+ case EM_OPEN8:
+ rtype = elf_open8_reloc_type (type);
+ break;
+
case EM_PPC:
rtype = elf_ppc_reloc_type (type);
break;
@@ -1855,6 +1861,7 @@ get_machine_name (unsigned e_machine)
case EM_ME16: return "Toyota ME16 processor";
case EM_ST100: return "STMicroelectronics ST100 processor";
case EM_TINYJ: return "Advanced Logic Corp. TinyJ embedded processor";
+ case EM_OPEN8: return "Open8/V8/ARClite 8-bit MCUs";
case EM_PDSP: return "Sony DSP processor";
case EM_PDP10: return "Digital Equipment Corp. PDP-10";
case EM_PDP11: return "Digital Equipment Corp. PDP-11";
@@ -9384,6 +9391,8 @@ is_32bit_abs_reloc (unsigned int reloc_type)
case EM_ALTERA_NIOS2:
case EM_NIOS32:
return reloc_type == 1; /* R_NIOS_32. */
+ case EM_OPEN8:
+ return reloc_type == 1;
case EM_OPENRISC:
case EM_OR32:
return reloc_type == 1; /* R_OR32_32. */
@@ -9602,6 +9611,8 @@ is_16bit_abs_reloc (unsigned int reloc_type)
case EM_ALTERA_NIOS2:
case EM_NIOS32:
return reloc_type == 9; /* R_NIOS_16. */
+ case EM_OPEN8:
+ return reloc_type == 4; /* R_OPEN8_16. */
case EM_TI_C6000:
return reloc_type == 2; /* R_C6000_ABS16. */
case EM_XC16X:
diff --git config.sub config.sub
index 18b17aa..b177726 100755
--- config.sub
+++ config.sub
@@ -4,7 +4,7 @@
# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
# 2011 Free Software Foundation, Inc.
-timestamp='2011-03-23'
+timestamp='2011-03-25'
# This file is (in principle) common to ALL GNU software.
# The presence of a machine in this file suggests that SOME GNU software
@@ -286,6 +286,7 @@ case $basic_machine in
| nds32 | nds32le | nds32be \
| nios | nios2 \
| ns16k | ns32k \
+ | open8 \
| or32 \
| pdp10 | pdp11 | pj | pjl \
| powerpc | powerpc64 | powerpc64le | powerpcle \
@@ -394,6 +395,7 @@ case $basic_machine in
| nds32-* | nds32le-* | nds32be-* \
| nios-* | nios2-* \
| none-* | np1-* | ns16k-* | ns32k-* \
+ | open8-* \
| orion-* \
| pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \
| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \
diff --git configure configure
index 9322d7b..2cdd467 100755
--- configure
+++ configure
@@ -3481,6 +3481,9 @@ case "${target}" in
noconfigdirs="$noconfigdirs gprof ${libgcj}"
libgloss_dir=mips
;;
+ open8-*-*)
+ noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj} target-libssp"
+ ;;
romp-*-*)
noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
;;
diff --git configure.ac configure.ac
index ca5a45f..d5927b6 100644
--- configure.ac
+++ configure.ac
@@ -927,6 +927,9 @@ case "${target}" in
noconfigdirs="$noconfigdirs gprof ${libgcj}"
libgloss_dir=mips
;;
+ open8-*-*)
+ noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj} target-libssp"
+ ;;
romp-*-*)
noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
;;
diff --git elfcpp/ChangeLog elfcpp/ChangeLog
index e2de091..5373d2e 100644
--- elfcpp/ChangeLog
+++ elfcpp/ChangeLog
@@ -1,3 +1,7 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * elfcpp.h: Add support for Open8 MCU
+
2010-08-12 Cary Coutant <ccoutant@google.com>
* elfcpp.h (enum SHT): Add SHT_GNU_INCREMENTAL_GOT_PLT.
diff --git elfcpp/elfcpp.h elfcpp/elfcpp.h
index b3eff64..565f2d5 100644
--- elfcpp/elfcpp.h
+++ elfcpp/elfcpp.h
@@ -269,6 +269,8 @@ enum EM
EM_UNICORE = 110,
EM_ALTERA_NIOS2 = 113,
EM_CRX = 114,
+ /* Open8/ARClite/V8. */
+ EM_OPEN8 = 196,
// The Morph MT.
EM_MT = 0x2530,
// DLX.
diff --git gas/ChangeLog gas/ChangeLog
index d4d4f7e..8de922f 100644
--- gas/ChangeLog
+++ gas/ChangeLog
@@ -1,3 +1,11 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * Makefile.am: Add support for Open8 MCU
+ * Makefile.in: Add support for Open8 MCU
+ * config/tc-open8.c: Add support for Open8 MCU
+ * config/tc-open8.h: Add support for Open8 MCU
+ * configure.tgt: Add support for Open8 MCU
+
2011-03-30 Michael Snyder <msnyder@vmware.com>
* obj-elf.c (obj_elf_section): Free malloced name.
diff --git gas/Makefile.am gas/Makefile.am
index 7b897f3..84cac83 100644
--- gas/Makefile.am
+++ gas/Makefile.am
@@ -145,6 +145,7 @@ TARGET_CPU_CFILES = \
config/tc-msp430.c \
config/tc-mt.c \
config/tc-ns32k.c \
+ config/tc-open8.c \
config/tc-openrisc.c \
config/tc-or32.c \
config/tc-pdp11.c \
@@ -208,6 +209,7 @@ TARGET_CPU_HFILES = \
config/tc-msp430.h \
config/tc-mt.h \
config/tc-ns32k.h \
+ config/tc-open8.h \
config/tc-openrisc.h \
config/tc-or32.h \
config/tc-pdp11.h \
diff --git gas/Makefile.in gas/Makefile.in
index 1aa9bb4..459584b 100644
--- gas/Makefile.in
+++ gas/Makefile.in
@@ -412,6 +412,7 @@ TARGET_CPU_CFILES = \
config/tc-msp430.c \
config/tc-mt.c \
config/tc-ns32k.c \
+ config/tc-open8.c \
config/tc-openrisc.c \
config/tc-or32.c \
config/tc-pdp11.c \
@@ -475,6 +476,7 @@ TARGET_CPU_HFILES = \
config/tc-msp430.h \
config/tc-mt.h \
config/tc-ns32k.h \
+ config/tc-open8.h \
config/tc-openrisc.h \
config/tc-or32.h \
config/tc-pdp11.h \
@@ -819,6 +821,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-msp430.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mt.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ns32k.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-open8.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-openrisc.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-or32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-pdp11.Po@am__quote@
@@ -1399,6 +1402,20 @@ tc-ns32k.obj: config/tc-ns32k.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-ns32k.obj `if test -f 'config/tc-ns32k.c'; then $(CYGPATH_W) 'config/tc-ns32k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-ns32k.c'; fi`
+tc-open8.o: config/tc-open8.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-open8.o -MD -MP -MF $(DEPDIR)/tc-open8.Tpo -c -o tc-open8.o `test -f 'config/tc-open8.c' || echo '$(srcdir)/'`config/tc-open8.c
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-open8.Tpo $(DEPDIR)/tc-open8.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-open8.c' object='tc-open8.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-open8.o `test -f 'config/tc-open8.c' || echo '$(srcdir)/'`config/tc-open8.c
+
+tc-open8.obj: config/tc-open8.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-open8.obj -MD -MP -MF $(DEPDIR)/tc-open8.Tpo -c -o tc-open8.obj `if test -f 'config/tc-open8.c'; then $(CYGPATH_W) 'config/tc-open8.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-open8.c'; fi`
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-open8.Tpo $(DEPDIR)/tc-open8.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-open8.c' object='tc-open8.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-open8.obj `if test -f 'config/tc-open8.c'; then $(CYGPATH_W) 'config/tc-open8.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-open8.c'; fi`
+
tc-openrisc.o: config/tc-openrisc.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-openrisc.o -MD -MP -MF $(DEPDIR)/tc-openrisc.Tpo -c -o tc-openrisc.o `test -f 'config/tc-openrisc.c' || echo '$(srcdir)/'`config/tc-openrisc.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-openrisc.Tpo $(DEPDIR)/tc-openrisc.Po
diff --git gas/config/tc-open8.c gas/config/tc-open8.c
new file mode 100644
index 0000000..02fbb24
--- /dev/null
+++ gas/config/tc-open8.c
@@ -0,0 +1,985 @@
+/* tc-open8.c -- Assembler code for the Open8/V8/ARClite MCU
+
+ Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
+ 2010, 2011 Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to
+ the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+#include <limits.h> /* for CHAR_BIT. */
+#include "as.h"
+#include "safe-ctype.h"
+#include "subsegs.h"
+
+struct open8_opcodes_s
+{
+ char * name;
+ char * constraints;
+ int insn_size; /* In bytes. */
+ int isa;
+ unsigned long long bin_opcode;
+};
+
+#define OPEN8_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN, MASK) \
+ {#NAME, CONSTR, SIZE, ISA, BIN},
+
+struct open8_opcodes_s open8_opcodes[] =
+ {
+#include "opcode/open8.h"
+ {NULL, NULL, 0, 0, 0}
+ };
+
+const char comment_chars[] = ";";
+const char line_comment_chars[] = "#";
+const char line_separator_chars[] = "$";
+
+const char *md_shortopts = "m:";
+struct mcu_type_s
+{
+ char *name;
+ int isa;
+ int mach;
+};
+
+static struct mcu_type_s mcu_types[] =
+ {
+ {"open8", OPEN8_ISA_OPEN8, bfd_mach_open8_1},
+ {NULL, 0, 0}
+ };
+
+/* Current MCU type. */
+static struct mcu_type_s default_mcu = {"open8",
+ OPEN8_ISA_OPEN8,
+ bfd_mach_open8_1};
+static struct mcu_type_s * open8_mcu = &default_mcu;
+
+/* OPEN8 target-specific switches. */
+struct open8_opt_s
+{
+ int all_opcodes; /* -mall-opcodes: accept all known OPEN8 opcodes. */
+};
+
+static struct open8_opt_s open8_opt = { 0 };
+
+const char EXP_CHARS[] = "eE";
+const char FLT_CHARS[] = "dD";
+
+static void open8_set_arch (int);
+
+/* The target specific pseudo-ops which we support. */
+const pseudo_typeS md_pseudo_table[] =
+ {
+ {"arch", open8_set_arch, 0},
+ { NULL, NULL, 0}
+ };
+
+#define EXP_MOD_NAME(i) (exp_mod[i].name)
+#define EXP_MOD_RELOC(i) (exp_mod[i].reloc)
+#define EXP_MOD_NEG_RELOC(i) (exp_mod[i].neg_reloc)
+
+struct exp_mod_s
+{
+ char * name;
+ bfd_reloc_code_real_type reloc;
+ bfd_reloc_code_real_type neg_reloc;
+};
+
+static struct exp_mod_s exp_mod[] =
+ {
+ {"hi8", BFD_RELOC_OPEN8_HI8_LDI, BFD_RELOC_OPEN8_HI8_LDI_NEG},
+ {"lo8", BFD_RELOC_OPEN8_LO8_LDI, BFD_RELOC_OPEN8_LO8_LDI_NEG},
+ };
+
+/* A union used to store indicies into the exp_mod[] array
+ in a hash table which expects void * data types. */
+typedef union
+{
+ void * ptr;
+ int index;
+} mod_index;
+
+/* Opcode hash table. */
+static struct hash_control *open8_hash;
+
+/* Reloc modifiers hash control (hi8,lo8). */
+static struct hash_control *open8_mod_hash;
+
+#define OPTION_MMCU 'm'
+enum options
+ {
+ OPTION_ALL_OPCODES = OPTION_MD_BASE + 1
+ };
+
+struct option md_longopts[] =
+ {
+ { "mmcu", required_argument, NULL, OPTION_MMCU },
+ { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
+ { NULL, no_argument, NULL, 0 }
+ };
+
+size_t md_longopts_size = sizeof (md_longopts);
+
+/* Display nicely formatted list of known MCU names. */
+
+static void
+show_mcu_list (FILE *stream)
+{
+ int i, x;
+
+ fprintf (stream, _("Known MCU names:"));
+ x = 1000;
+
+ for (i = 0; mcu_types[i].name; i++)
+ {
+ int len = strlen (mcu_types[i].name);
+
+ x += len + 1;
+
+ if (x < 75)
+ fprintf (stream, " %s", mcu_types[i].name);
+ else
+ {
+ fprintf (stream, "\n %s", mcu_types[i].name);
+ x = len + 2;
+ }
+ }
+
+ fprintf (stream, "\n");
+}
+
+static inline char *
+skip_space (char *s)
+{
+ while (*s == ' ' || *s == '\t')
+ ++s;
+ return s;
+}
+
+/* Extract one word from FROM and copy it to TO. */
+
+static char *
+extract_word (char *from, char *to, int limit)
+{
+ char *op_end;
+ int size = 0;
+
+ /* Drop leading whitespace. */
+ from = skip_space (from);
+ *to = 0;
+
+ /* Find the op code end. */
+ for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
+ {
+ to[size++] = *op_end++;
+ if (size + 1 >= limit)
+ break;
+ }
+
+ to[size] = 0;
+ return op_end;
+}
+
+int
+md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
+ asection *seg ATTRIBUTE_UNUSED)
+{
+ abort ();
+ return 0;
+}
+
+void
+md_show_usage (FILE *stream)
+{
+ fprintf (stream,
+ _("OPEN8 options:\n"
+ " -mmcu=[open8-name] select microcontroller variant\n"
+ " [open8-name] can be:\n"
+ " open8 - open8 RISC from `OpenCores.org'.\n"
+ ""));
+ fprintf (stream,
+ _(" -mall-opcodes accept all opcodes\n"
+ ""));
+ show_mcu_list (stream);
+}
+
+static void
+open8_opcode_hash (void)
+{
+
+ struct open8_opcodes_s *opcode;
+
+ /* Discard any prior opcode hash table. */
+ if (open8_hash)
+ {
+ hash_die (open8_hash);
+ }
+
+ /* Create a new opcode hash table. */
+ open8_hash = hash_new ();
+
+ /* Insert unique names into hash table. This hash table then provides a
+ quick index to the first opcode with a particular name in the opcode
+ table. */
+ for (opcode = open8_opcodes; opcode->name; opcode++)
+ {
+ if (open8_opt.all_opcodes || open8_mcu->isa & opcode->isa)
+ {
+ hash_insert (open8_hash, opcode->name, (char *) opcode);
+ }
+ }
+}
+
+static void
+open8_set_arch (int dummy ATTRIBUTE_UNUSED)
+{
+ char str[20];
+
+ input_line_pointer = extract_word (input_line_pointer, str, 20);
+ md_parse_option (OPTION_MMCU, str);
+ bfd_set_arch_mach (stdoutput, TARGET_ARCH, open8_mcu->mach);
+
+ /* Rebuild the opcode hash. */
+ open8_opcode_hash ();
+}
+
+int
+md_parse_option (int c, char *arg)
+{
+ switch (c)
+ {
+ case OPTION_MMCU:
+ {
+ int i;
+ char *s = alloca (strlen (arg) + 1);
+
+ /* Accept mixed case in options, force to lower case
+ * to simplify recognition.
+ */
+ {
+ char *t = s;
+ char *arg1 = arg;
+
+ do
+ {
+ *t = TOLOWER (*arg1++);
+ }
+ while (*t++);
+ }
+
+ for (i = 0; mcu_types[i].name; ++i)
+ {
+ if (strcmp (mcu_types[i].name, s) == 0)
+ break;
+ }
+
+ if (!mcu_types[i].name)
+ {
+ show_mcu_list (stderr);
+ as_fatal (_("unknown MCU: %s\n"), arg);
+ }
+
+ /* It is OK to redefine mcu type within the same open8 bfd machine
+ type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
+ as `.arch' in the asm output at the same time. */
+ if (open8_mcu == &default_mcu || open8_mcu->mach == mcu_types[i].mach)
+ {
+ open8_mcu = &mcu_types[i];
+ }
+ else
+ {
+ as_fatal (_("redefinition of mcu type `%s' to `%s'"),
+ open8_mcu->name, mcu_types[i].name);
+ }
+ return 1;
+ }
+ case OPTION_ALL_OPCODES:
+ {
+ open8_opt.all_opcodes = 1;
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+symbolS *
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
+{
+ return NULL;
+}
+
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+ return ieee_md_atof (type, litP, sizeP, FALSE);
+}
+
+void
+md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ fragS *fragP ATTRIBUTE_UNUSED)
+{
+ abort ();
+}
+
+void
+md_begin (void)
+{
+ unsigned int i;
+
+ /* Setup the valid opcodes for this architecture. */
+ open8_opcode_hash ();
+
+ open8_mod_hash = hash_new ();
+
+ for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
+ {
+ mod_index m;
+
+ m.index = i + 10;
+ hash_insert (open8_mod_hash, EXP_MOD_NAME (i), m.ptr);
+ }
+
+ bfd_set_arch_mach (stdoutput, TARGET_ARCH, open8_mcu->mach);
+}
+
+/* Resolve STR as an unsigned constant expression and return the result.
+ If result greater than MAX then error. */
+
+static unsigned int
+open8_get_uconstant (char *str, int max)
+{
+ expressionS ex;
+
+ str = skip_space (str);
+ input_line_pointer = str;
+ expression (& ex);
+
+ if (ex.X_op != O_constant)
+ as_bad (_("constant value required"));
+
+ if (ex.X_add_number > max || ex.X_add_number < 0)
+ as_bad (_("number must be positive and less than %d"), max + 1);
+
+ return ex.X_add_number;
+}
+
+/* Parse ordinary expression. */
+
+static char *
+parse_exp (char *s, expressionS *op)
+{
+ input_line_pointer = s;
+ expression (op);
+ if (op->X_op == O_absent)
+ as_bad (_("missing operand"));
+ return input_line_pointer;
+}
+
+/* Parse special expressions (needed for LDI command):
+ xx8 (address)
+ xx8 (-address)
+ where xx is: hi, lo. */
+
+static bfd_reloc_code_real_type
+open8_ldi_expression (expressionS *exp)
+{
+ char *str = input_line_pointer;
+ char *tmp;
+ char op[8];
+ int mod;
+
+ tmp = str;
+
+ str = extract_word (str, op, sizeof (op));
+
+ if (op[0])
+ {
+ mod_index m;
+
+ m.ptr = hash_find (open8_mod_hash, op);
+ mod = m.index;
+
+ if (mod)
+ {
+ int closes = 0;
+
+ mod -= 10;
+ str = skip_space (str);
+
+ if (*str == '(')
+ {
+ bfd_reloc_code_real_type reloc_to_return;
+ int neg_p = 0;
+
+ ++str;
+
+ if (*str == '-' && *(str + 1) == '(')
+ {
+ neg_p ^= 1;
+ ++closes;
+ str += 2;
+ }
+
+ input_line_pointer = str;
+ expression (exp);
+
+ do
+ {
+ if (*input_line_pointer != ')')
+ {
+ as_bad (_("`)' required"));
+ break;
+ }
+ input_line_pointer++;
+ }
+ while (closes--);
+
+ reloc_to_return =
+ neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
+ return reloc_to_return;
+ }
+ }
+ }
+
+ input_line_pointer = tmp;
+ expression (exp);
+
+ /* Warn about expressions that fail to use lo8 (). */
+ if (exp->X_op == O_constant)
+ {
+ int x = exp->X_add_number;
+
+ if (x < -128 || x > 255)
+ as_warn (_("constant out of 8-bit range: %d"), x);
+ }
+
+ return BFD_RELOC_OPEN8_LO8_LDI;
+}
+
+/* Parse one instruction operand.
+ Return operand bitmask. Also fixups can be generated. */
+
+static unsigned long long
+open8_operand (int where,
+ char *op,
+ char **line)
+{
+ expressionS op_expr;
+ unsigned long long op_mask = 0;
+ char *str = skip_space (*line);
+
+ switch (*op)
+ {
+ /* Any register operand. */
+ case 'r':
+ case 'e':
+ {
+ if (*str == 'r' || *str == 'R')
+ {
+ char r_name[20];
+ str = extract_word (str, r_name, sizeof (r_name));
+ op_mask = 0xff;
+ if (ISDIGIT (r_name[1]))
+ {
+ if (r_name[2] == '\0')
+ op_mask = r_name[1] - '0';
+ }
+ }
+
+ if (op_mask <= 7)
+ {
+ switch (*op)
+ {
+ case 'e':
+ /* Enforce even register requirement. */
+ if (op_mask & 1)
+ as_bad (_("register r0, r2, r4, or r6 required"));
+ break;
+
+ case 'r':
+ break;
+
+ }
+ break;
+ }
+
+ as_bad (_("register name from r0 to r7 required"));
+ }
+ break;
+
+ /* Unsigned offset expression, eight bits, range 0 to 255. */
+ case 'u':
+ {
+ str = parse_exp (str, &op_expr);
+ fix_new_exp (frag_now, where + 1, 1,
+ &op_expr, FALSE, BFD_RELOC_8);
+ }
+ break;
+
+ /* Signed pc-relative offset expression, eight bits,
+ range -128 to 127. */
+ case 's':
+ {
+ str = parse_exp (str, &op_expr);
+ fix_new_exp (frag_now, where + 1, 1,
+ &op_expr, FALSE, BFD_RELOC_OPEN8_PCREL);
+ }
+ break;
+
+ /* Parse expression for the ldi instruction. */
+ case 'i':
+ {
+ bfd_reloc_code_real_type r_type;
+
+ input_line_pointer = str;
+ r_type = open8_ldi_expression (&op_expr);
+ str = input_line_pointer;
+ fix_new_exp (frag_now, where+1, 1,
+ &op_expr, FALSE, r_type);
+ }
+ break;
+
+ /* Unsigned constant in the range 0..7. */
+ case 'n':
+ case 'b':
+ {
+ unsigned int x;
+
+ x = open8_get_uconstant (str, 7);
+ str = input_line_pointer;
+ op_mask |= x;
+ }
+ break;
+
+ /* Unsigned 16 bit address expression for JMP or JSR. */
+ case 'h':
+ {
+ str = parse_exp (str, &op_expr);
+ fix_new_exp (frag_now, where + 1, 2,
+ &op_expr, FALSE, BFD_RELOC_OPEN8_CALL);
+ }
+ break;
+
+ /* Unsigned 16 bit address expression for composed JMP variant. */
+ case 'H':
+ {
+ str = parse_exp (str, &op_expr);
+ fix_new_exp (frag_now, where + 3, 2,
+ &op_expr, FALSE, BFD_RELOC_OPEN8_CALL);
+ }
+ break;
+
+ /* Unsigned 16 bit address expression for load or store instructions. */
+ case 'M':
+ {
+ str = parse_exp (str, &op_expr);
+ fix_new_exp (frag_now, where + 1, 2,
+ &op_expr, FALSE, BFD_RELOC_16);
+ }
+ break;
+
+ /* Autoincrement operator on index. */
+ case 'a':
+ {
+ if (str[0] == '+' && str[1] == '+')
+ {
+ str = skip_space (str + 2);
+ op_mask = 0x1;
+ }
+ }
+ break;
+
+ default:
+ as_bad (_("unknown constraint `%c'"), *op);
+ }
+
+ *line = str;
+ return op_mask;
+}
+
+/* Parse instruction operands.
+ Return binary opcode. */
+
+static unsigned long long
+open8_operands (struct open8_opcodes_s *opcode, char **line)
+{
+ char *op = opcode->constraints;
+ unsigned long long bin = opcode->bin_opcode;
+ unsigned long long reg1 = 0, reg2 = 0, reg3 = 0;
+ char *frag = frag_more (opcode->insn_size);
+ char *str = *line;
+ int where = frag - frag_now->fr_literal;
+
+ /* Opcodes optionally have operands. */
+ /* The operand patterns are:
+ <empty> |
+ op1 |
+ op1 op2 |
+ op1,op2 |
+ op1 op2,op3
+ */
+ if (*op)
+ {
+ /* Parse first operand. */
+ reg1 = open8_operand (where, op, &str);
+ ++op;
+
+ /* Parse second operand, if present. */
+ if (*op)
+ {
+ str = skip_space (str);
+
+ /* require a comma, if present in the pattern. */
+ if (*op == ',')
+ {
+ ++op;
+ if (*str++ != ',')
+ {
+ as_bad (_("`,' required"));
+ }
+ str = skip_space (str);
+ }
+
+ reg2 = open8_operand (where, op, &str);
+ ++op;
+ }
+
+ /* Parse third operand, if present. */
+ if (*op)
+ {
+
+ str = skip_space (str);
+
+ /* require a comma, if present in the pattern. */
+ if (*op == ',')
+ {
+ ++op;
+ if (*str++ != ',')
+ {
+ as_bad (_("`,' required"));
+ }
+ str = skip_space (str);
+ }
+
+ reg3 = open8_operand (where, op, &str);
+ }
+ }
+
+ bin |= reg1 | reg2 | reg3;
+
+ unsigned long long scr = bin;
+
+ /* Copy the instruction bytes to the frag, supporting
+ * only instructions sizes that are defined for the OPEN8.
+ * NB: note the fallthroughs. */
+ switch (opcode->insn_size)
+ {
+ case 5:
+ *frag++ = (unsigned char)scr;
+ scr >>= CHAR_BIT;
+ *frag++ = (unsigned char)scr;
+ scr >>= CHAR_BIT;
+ /* FALLTHROUGH. */
+ case 3:
+ *frag++ = (unsigned char)scr;
+ scr >>= CHAR_BIT;
+ /* FALLTHROUGH. */
+ case 2:
+ *frag++ = (unsigned char)scr;
+ scr >>= CHAR_BIT;
+ /* FALLTHROUGH. */
+ case 1:
+ *frag++ = (unsigned char)scr;
+ break;
+
+ default:
+ as_fatal (_("unsupported instruction size: %d\n"), opcode->insn_size);
+ }
+
+ *line = str;
+ return bin;
+}
+
+/* GAS will call this function for each section at the end of the assembly,
+ to permit the CPU backend to adjust the alignment of a section. */
+
+valueT
+md_section_align (asection *seg, valueT addr)
+{
+ int align = bfd_get_section_alignment (stdoutput, seg);
+ return ((addr + (1 << align) - 1) & (-1 << align));
+}
+
+/* If you define this macro, it should return the offset between the
+ address of a PC relative fixup and the position from which the PC
+ relative adjustment should be made. On many processors, the base
+ of a PC relative instruction is the next instruction, so this
+ macro would return the length of an instruction. */
+
+long
+md_pcrel_from_section (fixS *fixp, segT sec)
+{
+ if (fixp->fx_addsy != (symbolS *) NULL
+ && (!S_IS_DEFINED (fixp->fx_addsy)
+ || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
+ return 0;
+
+ return fixp->fx_frag->fr_address + fixp->fx_where;
+}
+
+/* GAS will call this for each fixup. It should store the correct
+ value in the object file. */
+
+void
+md_apply_fix (fixS *fixP, valueT * valP, segT seg)
+{
+ unsigned char *where;
+ unsigned long insn;
+ long value = *valP;
+
+ if (fixP->fx_addsy == (symbolS *) NULL)
+ fixP->fx_done = 1;
+
+ else if (fixP->fx_pcrel)
+ {
+ segT s = S_GET_SEGMENT (fixP->fx_addsy);
+
+ if (s == seg || s == absolute_section)
+ {
+ value += S_GET_VALUE (fixP->fx_addsy);
+ fixP->fx_done = 1;
+ }
+ }
+
+ /* We don't actually support subtracting a symbol. */
+ if (fixP->fx_subsy != (symbolS *) NULL)
+ as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+
+ switch (fixP->fx_r_type)
+ {
+ default:
+ fixP->fx_no_overflow = 1;
+ break;
+ case BFD_RELOC_32:
+ case BFD_RELOC_16:
+ case BFD_RELOC_OPEN8_CALL:
+ break;
+ }
+
+ if (fixP->fx_done)
+ {
+ /* Fetch the instruction, insert the fully resolved operand
+ value, and stuff the instruction back again. */
+ where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
+ insn = bfd_getl16 (where);
+
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_32:
+ bfd_putl16 ((bfd_vma) value, where);
+ break;
+
+ case BFD_RELOC_16:
+ if (value > 65535 || value < -32768)
+ {
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("operand out of range: %ld"), value);
+ }
+ bfd_putl16 ((bfd_vma) value, where);
+ break;
+
+ case BFD_RELOC_8:
+ if (value > 255 || value < -128)
+ {
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("operand out of range: %ld"), value);
+ }
+ *where = value;
+ break;
+
+ case BFD_RELOC_OPEN8_LO8_LDI:
+ *where = value;
+ break;
+
+ case BFD_RELOC_OPEN8_HI8_LDI:
+ *where = value >> 8;
+ break;
+
+ case BFD_RELOC_OPEN8_LO8_LDI_NEG:
+ *where = -value;
+ break;
+
+ case BFD_RELOC_OPEN8_HI8_LDI_NEG:
+ *where = -value >> 8;
+ break;
+
+ case BFD_RELOC_OPEN8_CALL:
+ {
+ if (value > 65535 || value < -32768)
+ {
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("operand out of range: %ld"), value);
+ }
+ bfd_putl16 ((bfd_vma) value, where);
+ }
+ break;
+
+ case BFD_RELOC_OPEN8_PCREL:
+
+ if ((value < -128) || (value > 127))
+ {
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("operand out of range[-128..127]: %ld"), value);
+ }
+ *where = value;
+ break;
+
+ default:
+ as_fatal (_("line %d: unknown relocation type: 0x%x"),
+ fixP->fx_line, fixP->fx_r_type);
+ break;
+ }
+ }
+ else
+ {
+ switch ((int) fixP->fx_r_type)
+ {
+ case -BFD_RELOC_OPEN8_HI8_LDI_NEG:
+ case -BFD_RELOC_OPEN8_HI8_LDI:
+ case -BFD_RELOC_OPEN8_LO8_LDI_NEG:
+ case -BFD_RELOC_OPEN8_LO8_LDI:
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("only constant expression allowed"));
+ fixP->fx_done = 1;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+/* GAS will call this to generate a reloc, passing the resulting reloc
+ to `bfd_install_relocation'. This currently works poorly, as
+ `bfd_install_relocation' often does the wrong thing, and instances of
+ `tc_gen_reloc' have been written to work around the problems, which
+ in turns makes it difficult to fix `bfd_install_relocation'. */
+
+/* If while processing a fixup, a reloc really needs to be created
+ then it is done here. */
+
+arelent *
+tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
+ fixS *fixp)
+{
+ arelent *reloc;
+
+ if (fixp->fx_addsy && fixp->fx_subsy)
+ {
+ long value = 0;
+
+ if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
+ || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ "Difference of symbols in different sections"
+ " is not supported");
+ return NULL;
+ }
+
+ /* We are dealing with two symbols defined in the same section.
+ Let us fix-up them here. */
+ value += S_GET_VALUE (fixp->fx_addsy);
+ value -= S_GET_VALUE (fixp->fx_subsy);
+
+ /* When fx_addsy and fx_subsy both are zero, md_apply_fix
+ only takes it's second operands for the fixup value. */
+ fixp->fx_addsy = NULL;
+ fixp->fx_subsy = NULL;
+ md_apply_fix (fixp, (valueT *) &value, NULL);
+
+ return NULL;
+ }
+
+ reloc = xmalloc (sizeof (arelent));
+
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ if (reloc->howto == (reloc_howto_type *) NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("reloc %d not supported by object file format"),
+ (int) fixp->fx_r_type);
+ return NULL;
+ }
+
+ if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ reloc->address = fixp->fx_offset;
+
+ reloc->addend = fixp->fx_offset;
+
+ return reloc;
+}
+
+void
+md_assemble (char *str)
+{
+ struct open8_opcodes_s *opcode;
+ char op[11];
+
+ str = skip_space (extract_word (str, op, sizeof (op)));
+
+ if (!op[0])
+ as_bad (_("can't find opcode "));
+
+ opcode = (struct open8_opcodes_s *) hash_find (open8_hash, op);
+
+ if (opcode == NULL)
+ {
+ as_bad (_("unknown opcode `%s'"), op);
+ return;
+ }
+
+ /* Check to see if opcode allowed. */
+ if (!open8_opt.all_opcodes
+ && ((opcode->isa & open8_mcu->isa) != open8_mcu->isa))
+ {
+ as_bad (_("illegal opcode \"%s\" for mcu %s"),
+ opcode->name,
+ open8_mcu->name);
+ }
+
+ dwarf2_emit_insn (0);
+
+ /* We used to set input_line_pointer to the result of get_operands,
+ but that is wrong. Our caller assumes we don't change it. */
+ {
+ char *t = input_line_pointer;
+
+ open8_operands (opcode, &str);
+ if (*skip_space (str))
+ as_bad (_("garbage at end of line"));
+ input_line_pointer = t;
+ }
+}
+
diff --git gas/config/tc-open8.h gas/config/tc-open8.h
new file mode 100644
index 0000000..4cd4238
--- /dev/null
+++ gas/config/tc-open8.h
@@ -0,0 +1,131 @@
+/* This file is tc-open8.h
+ Copyright 1999, 2000, 2001, 2002, 2005, 2006, 2007, 2011
+ Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays, <khays@hayshaus.com>
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+/* By convention, you should define this macro in the `.h' file. For
+ example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
+ if it is necessary to add CPU specific code to the object format
+ file. */
+#define TC_OPEN8
+
+/* This macro is the BFD target name to use when creating the output
+ file. This will normally depend upon the `OBJ_FMT' macro. */
+#define TARGET_FORMAT "elf32-open8"
+
+/* This macro is the BFD architecture to pass to `bfd_set_arch_mach'. */
+#define TARGET_ARCH bfd_arch_open8
+
+/* This macro is the BFD machine number to pass to
+ `bfd_set_arch_mach'. If it is not defined, GAS will use 0. */
+#define TARGET_MACH 0
+
+/* You should define this macro to be non-zero if the target is big
+ endian, and zero if the target is little endian. */
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+/* If you define this macro, GAS will warn about the use of
+ nonstandard escape sequences in a string. */
+#undef ONLY_STANDARD_ESCAPES
+
+/* GAS will call this function for any expression that can not be
+ recognized. When the function is called, `input_line_pointer'
+ will point to the start of the expression. */
+#define md_operand(x)
+
+/* This should just call either `number_to_chars_bigendian' or
+ `number_to_chars_littleendian', whichever is appropriate. On
+ targets like the MIPS which support options to change the
+ endianness, which function to call is a runtime decision. On
+ other targets, `md_number_to_chars' can be a simple macro. */
+#define md_number_to_chars number_to_chars_littleendian
+
+/* `md_short_jump_size'
+ `md_long_jump_size'
+ `md_create_short_jump'
+ `md_create_long_jump'
+ If `WORKING_DOT_WORD' is defined, GAS will not do broken word
+ processing (*note Broken words::.). Otherwise, you should set
+ `md_short_jump_size' to the size of a short jump (a jump that is
+ just long enough to jump around a long jmp) and
+ `md_long_jump_size' to the size of a long jump (a jump that can go
+ anywhere in the function), You should define
+ `md_create_short_jump' to create a short jump around a long jump,
+ and define `md_create_long_jump' to create a long jump. */
+#define WORKING_DOT_WORD
+
+/* If you define this macro, it means that `tc_gen_reloc' may return
+ multiple relocation entries for a single fixup. In this case, the
+ return value of `tc_gen_reloc' is a pointer to a null terminated
+ array. */
+#undef RELOC_EXPANSION_POSSIBLE
+
+/* No shared lib support, so we don't need to ensure externally
+ visible symbols can be overridden. */
+#define EXTERN_FORCE_RELOC 0
+
+/* Values passed to md_apply_fix don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+/* If you define this macro, it should return the offset between the
+ address of a PC relative fixup and the position from which the PC
+ relative adjustment should be made. On many processors, the base
+ of a PC relative instruction is the next instruction, so this
+ macro would return the length of an instruction. */
+#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
+extern long md_pcrel_from_section (struct fix *, segT);
+
+/* The number of bytes to put into a word in a listing. This affects
+ the way the bytes are clumped together in the listing. For
+ example, a value of 2 might print `1234 5678' where a value of 1
+ would print `12 34 56 78'. The default value is 4. */
+#define LISTING_WORD_SIZE 2
+
+/* An `.lcomm' directive with no explicit alignment parameter will
+ use this macro to set P2VAR to the alignment that a request for
+ SIZE bytes will have. The alignment is expressed as a power of
+ two. If no alignment should take place, the macro definition
+ should do nothing. Some targets define a `.bss' directive that is
+ also affected by this macro. The default definition will set
+ P2VAR to the truncated power of two of sizes up to eight bytes. */
+#define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0
+
+/* We don't want gas to fixup the following program memory related relocations.
+ We will need them in case that we want to do linker relaxation.
+ We could in principle keep these fixups in gas when not relaxing.
+ However, there is no serious performance penilty when making the linker
+ make the fixup work. Check also that fx_addsy is not NULL, in order to make
+ sure that the fixup refers to some sort of label. */
+#define TC_VALIDATE_FIX(FIXP,SEG,SKIP) \
+ if ( (FIXP->fx_r_type == BFD_RELOC_OPEN8_PCREL) \
+ && (FIXP->fx_addsy)) \
+ { \
+ goto SKIP; \
+ }
+
+/* This target is buggy, and sets fix size too large. */
+#define TC_FX_SIZE_SLACK(FIX) 2
+
+/* OPEN8 instructions are 1, 2 or 3 bytes long. */
+#define DWARF2_LINE_MIN_INSN_LENGTH 1
+
+/* 32 bits pseudo-addresses are used on OPEN8. */
+#define DWARF2_ADDR_SIZE(bfd) 4
diff --git gas/configure.tgt gas/configure.tgt
index a01ff6c..da541ac 100644
--- gas/configure.tgt
+++ gas/configure.tgt
@@ -319,6 +319,8 @@ case ${generic_target} in
ns32k-pc532-lites*) fmt=aout em=nbsd532 ;;
ns32k-*-*n*bsd*) fmt=aout em=nbsd532 ;;
+ open8-*-*) fmt=elf bfd_gas=yes;;
+
openrisc-*-*) fmt=elf ;;
or32-*-rtems*) fmt=elf ;;
diff --git gas/testsuite/ChangeLog gas/testsuite/ChangeLog
index 51502ee..bedfa65 100644
--- gas/testsuite/ChangeLog
+++ gas/testsuite/ChangeLog
@@ -1,3 +1,131 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * gas/open8/adc.d: Add support for Open8 MCU
+ * gas/open8/adc.s: Add support for Open8 MCU
+ * gas/open8/add.d: Add support for Open8 MCU
+ * gas/open8/add.s: Add support for Open8 MCU
+ * gas/open8/and.d: Add support for Open8 MCU
+ * gas/open8/and.s: Add support for Open8 MCU
+ * gas/open8/br0.d: Add support for Open8 MCU
+ * gas/open8/br0.s: Add support for Open8 MCU
+ * gas/open8/br1.d: Add support for Open8 MCU
+ * gas/open8/br1.s: Add support for Open8 MCU
+ * gas/open8/brc.d: Add support for Open8 MCU
+ * gas/open8/brc.s: Add support for Open8 MCU
+ * gas/open8/brgez.d: Add support for Open8 MCU
+ * gas/open8/brgez.s: Add support for Open8 MCU
+ * gas/open8/brk.d: Add support for Open8 MCU
+ * gas/open8/brk.s: Add support for Open8 MCU
+ * gas/open8/brlz.d: Add support for Open8 MCU
+ * gas/open8/brlz.s: Add support for Open8 MCU
+ * gas/open8/brnc.d: Add support for Open8 MCU
+ * gas/open8/brnc.s: Add support for Open8 MCU
+ * gas/open8/brnz.d: Add support for Open8 MCU
+ * gas/open8/brnz.s: Add support for Open8 MCU
+ * gas/open8/brz.d: Add support for Open8 MCU
+ * gas/open8/brz.s: Add support for Open8 MCU
+ * gas/open8/btt.d: Add support for Open8 MCU
+ * gas/open8/btt.s: Add support for Open8 MCU
+ * gas/open8/clc.d: Add support for Open8 MCU
+ * gas/open8/clc.s: Add support for Open8 MCU
+ * gas/open8/cli.d: Add support for Open8 MCU
+ * gas/open8/cli.s: Add support for Open8 MCU
+ * gas/open8/cln.d: Add support for Open8 MCU
+ * gas/open8/cln.s: Add support for Open8 MCU
+ * gas/open8/clp.d: Add support for Open8 MCU
+ * gas/open8/clp.s: Add support for Open8 MCU
+ * gas/open8/clz.d: Add support for Open8 MCU
+ * gas/open8/clz.s: Add support for Open8 MCU
+ * gas/open8/cmp.d: Add support for Open8 MCU
+ * gas/open8/cmp.s: Add support for Open8 MCU
+ * gas/open8/dbnz.d: Add support for Open8 MCU
+ * gas/open8/dbnz.s: Add support for Open8 MCU
+ * gas/open8/dec.d: Add support for Open8 MCU
+ * gas/open8/dec.s: Add support for Open8 MCU
+ * gas/open8/gmsk.d: Add support for Open8 MCU
+ * gas/open8/gmsk.s: Add support for Open8 MCU
+ * gas/open8/inc.d: Add support for Open8 MCU
+ * gas/open8/inc.s: Add support for Open8 MCU
+ * gas/open8/int.d: Add support for Open8 MCU
+ * gas/open8/int.s: Add support for Open8 MCU
+ * gas/open8/jmp.d: Add support for Open8 MCU
+ * gas/open8/jmp.s: Add support for Open8 MCU
+ * gas/open8/jmp_2.d: Add support for Open8 MCU
+ * gas/open8/jmp_2.s: Add support for Open8 MCU
+ * gas/open8/jmpc.d: Add support for Open8 MCU
+ * gas/open8/jmpc.s: Add support for Open8 MCU
+ * gas/open8/jmpgez.d: Add support for Open8 MCU
+ * gas/open8/jmpgez.s: Add support for Open8 MCU
+ * gas/open8/jmplz.d: Add support for Open8 MCU
+ * gas/open8/jmplz.s: Add support for Open8 MCU
+ * gas/open8/jmpnc.d: Add support for Open8 MCU
+ * gas/open8/jmpnc.s: Add support for Open8 MCU
+ * gas/open8/jmpnz.d: Add support for Open8 MCU
+ * gas/open8/jmpnz.s: Add support for Open8 MCU
+ * gas/open8/jmpz.d: Add support for Open8 MCU
+ * gas/open8/jmpz.s: Add support for Open8 MCU
+ * gas/open8/jsr.d: Add support for Open8 MCU
+ * gas/open8/jsr.s: Add support for Open8 MCU
+ * gas/open8/lda.d: Add support for Open8 MCU
+ * gas/open8/lda.s: Add support for Open8 MCU
+ * gas/open8/ldi.d: Add support for Open8 MCU
+ * gas/open8/ldi.s: Add support for Open8 MCU
+ * gas/open8/ldo.d: Add support for Open8 MCU
+ * gas/open8/ldo.s: Add support for Open8 MCU
+ * gas/open8/ldx.d: Add support for Open8 MCU
+ * gas/open8/ldx.s: Add support for Open8 MCU
+ * gas/open8/mul.d: Add support for Open8 MCU
+ * gas/open8/mul.s: Add support for Open8 MCU
+ * gas/open8/nop.d: Add support for Open8 MCU
+ * gas/open8/nop.s: Add support for Open8 MCU
+ * gas/open8/open8.exp: Add support for Open8 MCU
+ * gas/open8/or.d: Add support for Open8 MCU
+ * gas/open8/or.s: Add support for Open8 MCU
+ * gas/open8/pop.d: Add support for Open8 MCU
+ * gas/open8/pop.s: Add support for Open8 MCU
+ * gas/open8/psh.d: Add support for Open8 MCU
+ * gas/open8/psh.s: Add support for Open8 MCU
+ * gas/open8/rol.d: Add support for Open8 MCU
+ * gas/open8/rol.s: Add support for Open8 MCU
+ * gas/open8/ror.d: Add support for Open8 MCU
+ * gas/open8/ror.s: Add support for Open8 MCU
+ * gas/open8/rsp.d: Add support for Open8 MCU
+ * gas/open8/rsp.s: Add support for Open8 MCU
+ * gas/open8/rti.d: Add support for Open8 MCU
+ * gas/open8/rti.s: Add support for Open8 MCU
+ * gas/open8/rts.d: Add support for Open8 MCU
+ * gas/open8/rts.s: Add support for Open8 MCU
+ * gas/open8/sample.d: Add support for Open8 MCU
+ * gas/open8/sample.s: Add support for Open8 MCU
+ * gas/open8/sbc.d: Add support for Open8 MCU
+ * gas/open8/sbc.s: Add support for Open8 MCU
+ * gas/open8/smsk.d: Add support for Open8 MCU
+ * gas/open8/smsk.s: Add support for Open8 MCU
+ * gas/open8/sta.d: Add support for Open8 MCU
+ * gas/open8/sta.s: Add support for Open8 MCU
+ * gas/open8/stc.d: Add support for Open8 MCU
+ * gas/open8/stc.s: Add support for Open8 MCU
+ * gas/open8/sti.d: Add support for Open8 MCU
+ * gas/open8/sti.s: Add support for Open8 MCU
+ * gas/open8/stn.d: Add support for Open8 MCU
+ * gas/open8/stn.s: Add support for Open8 MCU
+ * gas/open8/sto.d: Add support for Open8 MCU
+ * gas/open8/sto.s: Add support for Open8 MCU
+ * gas/open8/stp.d: Add support for Open8 MCU
+ * gas/open8/stp.s: Add support for Open8 MCU
+ * gas/open8/stx.d: Add support for Open8 MCU
+ * gas/open8/stx.s: Add support for Open8 MCU
+ * gas/open8/stz.d: Add support for Open8 MCU
+ * gas/open8/stz.s: Add support for Open8 MCU
+ * gas/open8/t0x.d: Add support for Open8 MCU
+ * gas/open8/t0x.s: Add support for Open8 MCU
+ * gas/open8/tx0.d: Add support for Open8 MCU
+ * gas/open8/tx0.s: Add support for Open8 MCU
+ * gas/open8/upp.d: Add support for Open8 MCU
+ * gas/open8/upp.s: Add support for Open8 MCU
+ * gas/open8/xor.d: Add support for Open8 MCU
+ * gas/open8/xor.s: Add support for Open8 MCU
+
2011-03-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/quad.d: Add tests for multiple operands.
diff --git include/ChangeLog include/ChangeLog
index de6858b..a0b5b57 100644
--- include/ChangeLog
+++ include/ChangeLog
@@ -1,3 +1,7 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * dis-asm.h: Add support for Open8 MCU
+
2011-03-24 Mark Wielaard <mjw@redhat.com>
* dwarf2.h (dwarf_form): Remove deprecated DW_FORM_sig8 define.
diff --git include/dis-asm.h include/dis-asm.h
index 63366d9..ee6c38e 100644
--- include/dis-asm.h
+++ include/dis-asm.h
@@ -271,6 +271,7 @@ extern int print_insn_moxie (bfd_vma, disassemble_info *);
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
extern int print_insn_mt (bfd_vma, disassemble_info *);
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
+extern int print_insn_open8 (bfd_vma, disassemble_info *);
extern int print_insn_openrisc (bfd_vma, disassemble_info *);
extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
extern int print_insn_pj (bfd_vma, disassemble_info *);
diff --git include/elf/ChangeLog include/elf/ChangeLog
index 182a59b..9b6ae4b 100644
--- include/elf/ChangeLog
+++ include/elf/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * common.h: Add support for Open8 MCU
+ * open8.h: Add support for Open8 MCU
+
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
* arm.h (R_ARM_IRELATIVE): New relocation.
diff --git include/elf/common.h include/elf/common.h
index 52ce9a5..149185a 100644
--- include/elf/common.h
+++ include/elf/common.h
@@ -295,6 +295,7 @@
#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
#define EM_CUDA 190 /* NVIDIA CUDA architecture */
+#define EM_OPEN8 196 /* Open8/ARClite/V8 architecture. */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
diff --git include/elf/open8.h include/elf/open8.h
new file mode 100644
index 0000000..4c612bd
--- /dev/null
+++ include/elf/open8.h
@@ -0,0 +1,50 @@
+/* Open8 ELF support for BFD.
+ Copyright 1999, 2000, 2004, 2006, 2010, 2011 Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays, <khays@hayshaus.com>
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#ifndef _ELF_OPEN8_H
+#define _ELF_OPEN8_H
+
+#include "elf/reloc-macros.h"
+
+/* Processor specific flags for the ELF header e_flags field. */
+#define EF_OPEN8_MACH 0x7F
+
+/* If bit #7 is set, it is assumed that the elf file uses local symbols
+ as reference for the relocations so that linker relaxation is possible. */
+#define EF_OPEN8_LINKRELAX_PREPARED 0x80
+
+#define E_OPEN8_MACH_OPEN8_1 1
+
+/* Relocations. */
+START_RELOC_NUMBERS (elf_open8_reloc_type)
+RELOC_NUMBER (R_OPEN8_NONE, 0)
+RELOC_NUMBER (R_OPEN8_32, 1)
+RELOC_NUMBER (R_OPEN8_PCREL, 2)
+RELOC_NUMBER (R_OPEN8_16, 3)
+RELOC_NUMBER (R_OPEN8_LO8_LDI, 4)
+RELOC_NUMBER (R_OPEN8_HI8_LDI, 5)
+RELOC_NUMBER (R_OPEN8_LO8_LDI_NEG, 6)
+RELOC_NUMBER (R_OPEN8_HI8_LDI_NEG, 7)
+RELOC_NUMBER (R_OPEN8_CALL, 8)
+RELOC_NUMBER (R_OPEN8_8, 9)
+END_RELOC_NUMBERS (R_OPEN8_max)
+
+#endif
diff --git include/opcode/ChangeLog include/opcode/ChangeLog
index fe85069..ab233bc 100644
--- include/opcode/ChangeLog
+++ include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * open8.h: Add support for Open8 MCU
+
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
diff --git include/opcode/open8.h include/opcode/open8.h
new file mode 100644
index 0000000..028034c
--- /dev/null
+++ include/opcode/open8.h
@@ -0,0 +1,281 @@
+/* Opcode table for the Open8/V8/ARClite MCUs
+
+ Copyright 2000, 2001, 2004, 2006, 2008, 2010, 2011
+ Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#define OPEN8_ISA_OPEN8 0x0001 /* Opcode set as published for the Open8. */
+#define OPEN8_ISA_V8 0x0002 /* Opcode set for original VAutomation V8. */
+#define OPEN8_ISA_ALL (OPEN8_ISA_V8 | OPEN8_ISA_OPEN8)
+
+/* constraint letters
+ r - any general purpose register index (R0..R7)
+ e - any even numbered general purpose register, the upper two
+ bits thereof
+
+ u - unsigned offset expression, 8 bits, from 0 to 255,
+ always 2nd byte of insn
+ s - signed pc-relative offset expression, 8 bits, from -128 to 127,
+ always 2nd byte of insn
+ i - immediate value expression, eight bits, signed or unsigned,
+ always 2nd byte of insn
+
+ n - immediate value expression from 0 to 7, 3 bits
+ b - immediate value expression from 0 to 7, 3 bits, indexing PSR
+
+ h - 16 bit address expression for JMP variant,
+ located at bytes 2 and 3 of the instruction
+
+ H - 16 bit address expression for composed JMP variants,
+ located at bytes 4 and 5 of the composed instruction
+
+ M - 16 bit memory address for load and store,
+ located at bytes 2 and 3 of the instruction
+
+ a - autoincrement operator - syntactically "++", bitvalue = 1, 0 if not
+ present
+
+ Order is important - some binary opcodes have more than one name,
+ the disassembler will only see the first match.
+
+*/
+
+#include <endian.h>
+
+#define R "rrr"
+#define E "ee"
+#define U "uuuuuuuu"
+#define S "ssssssss"
+#define I "iiiiiiii"
+#define N "nnn"
+#define B "bbb"
+#define H "hhhhhhhhhhhhhhhh"
+#define BIG_H "HHHHHHHHHHHHHHHH"
+#define M "MMMMMMMMMMMMMMMM"
+#define A "a"
+
+#define REGISTER_P(x) ((x) == 'r' || (x) == 'e')
+#define MAX_INSN_SIZE (5)
+
+#define SUBOP_MASK (0x07U)
+#define SUBOP_SHIFT (0U)
+
+#define REG_MASK (SUBOP_MASK)
+#define REG_SHIFT (SUBOP_SHIFT)
+
+#define EREG_MASK (SUBOP_MASK & 0x06U)
+#define EREG_SHIFT (SUBOP_SHIFT)
+
+#define U_MASK (0x0FF00U)
+#define U_SHIFT (8U)
+
+#define S_MASK (U_MASK)
+#define S_SHIFT (U_SHIFT)
+
+#define I_MASK (U_MASK)
+#define I_SHIFT (U_SHIFT)
+
+#define N_MASK (SUBOP_MASK)
+#define N_SHIFT (SUBOP_SHIFT)
+
+#define B_MASK (SUBOP_MASK)
+#define B_SHIFT (SUBOP_SHIFT)
+
+#define H_MASK (0xFFFF00ULL)
+#define H_SHIFT (8U)
+
+#define BIG_H_MASK (0xFFFF000000ULL)
+#define BIG_H_SHIFT (24U)
+
+#define M_MASK (0xFFFF00ULL)
+#define M_SHIFT (8U)
+
+#define A_MASK (0x01U)
+
+// ASSUMES LITTLE_ENDIAN HOST
+#if __BYTE_ORDER != __LITTLE_ENDIAN
+#error ("Open8/ARClite/V8 binutils assumes a little-endian host!")
+#endif
+
+#define MAKE_OPCODE(a, b, c) \
+ (((unsigned long long) (a)) \
+ | ((unsigned long long) (b) << 8) \
+ | ((unsigned long long) (c) << 16))
+
+/* Composite-mnemonics - generate two or more machine instructions,
+ * introduced to simplify compiler logic for branching,
+ * oftimes relaxed by peephole or linker into simple branches
+ */
+/* NB: these must come first, so that the composites are recognized first when
+ * disassembling.
+ */
+OPEN8_INSN (jmpz, "H", "10010000000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x090U,0x05U,0x0BCU), 0x0FFFFFFU)
+// brnz <label>
+// jmp h
+// <label>:
+
+
+OPEN8_INSN (jmpnz, "H", "10011000000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x098U,0x05U,0x0BCU), 0x0FFFFFFU)
+// brz <label>
+// jmp h,
+// <label>:
+
+OPEN8_INSN (jmplz, "H", "10010010000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x092U,0x05U,0x0BCU), 0x0FFFFFFU)
+// brgez <label>
+// jmp h
+// <label>:
+
+OPEN8_INSN (jmpgez,"H", "10011010000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x09AU,0x05U,0x0BCU), 0x0FFFFFFU)
+// brlz <label>
+// jmp h
+//<label>:
+
+OPEN8_INSN (jmpc, "H", "10010001000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x091U,0x05U,0x0BCU), 0x0FFFFFFU)
+// brnc <label>
+// jmp h
+// <label>:
+
+
+OPEN8_INSN (jmpnc, "H", "10011001000010010111100" BIG_H, 5, OPEN8_ISA_ALL, \
+ MAKE_OPCODE (0x099U,0x05U,0x0BCU), 0x0FFFFFFU)
+// brc <label>
+// jmp h
+// <label>:
+
+/* Pseudo-mnemonics - map 1:1 to actual machine instructions,
+ * introduced for programmer/compiler ease.
+ */
+/* NB: these must come before the actual machine instructions,
+ * so that the pseudo-mnemonics are recognized first when disassembling.
+ */
+OPEN8_INSN (stz, "", "01011000", 1, OPEN8_ISA_ALL, 0x058U, 0x0FFU)
+// stp 0
+
+OPEN8_INSN (stc, "", "01011001", 1, OPEN8_ISA_ALL, 0x059U, 0x0FFU)
+// stp 1
+
+OPEN8_INSN (stn, "", "01011010", 1, OPEN8_ISA_ALL, 0x05AU, 0x0FFU)
+// stp 2
+
+OPEN8_INSN (sti, "", "01011011", 1, OPEN8_ISA_ALL, 0x05BU, 0x0FFU)
+// stp 3
+
+OPEN8_INSN (clz, "", "01101000", 1, OPEN8_ISA_ALL, 0x068U, 0x0FFU)
+// clp 0
+
+OPEN8_INSN (clc, "", "01101001", 1, OPEN8_ISA_ALL, 0x069U, 0x0FFU)
+// clp 1
+
+OPEN8_INSN (cln, "", "01101010", 1, OPEN8_ISA_ALL, 0x06AU, 0x0FFU)
+// clp 2
+
+OPEN8_INSN (cli, "", "01101011", 1, OPEN8_ISA_ALL, 0x06BU, 0x0FFU)
+// clp 3
+
+OPEN8_INSN (brnz, "s", "10010000" S, 2, OPEN8_ISA_ALL, 0x090U, 0x0FFU)
+// br0 0, s
+
+OPEN8_INSN (brnc, "s", "10010001" S, 2, OPEN8_ISA_ALL, 0x091U, 0x0FFU)
+// br0 1, s
+
+OPEN8_INSN (brgez,"s", "10010010" S, 2, OPEN8_ISA_ALL, 0x092U, 0x0FFU)
+// br0 2, s
+
+OPEN8_INSN (brz, "s", "10011000" S, 2, OPEN8_ISA_ALL, 0x098U, 0x0FFU)
+// br1 0, s
+
+OPEN8_INSN (brc, "s", "10011001" S, 2, OPEN8_ISA_ALL, 0x099U, 0x0FFU)
+// br1 1, s
+
+OPEN8_INSN (brlz, "s", "10011010" S, 2, OPEN8_ISA_ALL, 0x09AU, 0x0FFU)
+// br1 2, s
+
+OPEN8_INSN (nop, "", "10111011", 1, OPEN8_ISA_ALL, 0x0BBU, 0x0FFU)
+// brk
+
+// Native instructions
+OPEN8_INSN (inc, "r", "00000" R, 1, OPEN8_ISA_ALL, 0x000U, 0x0F8U)
+OPEN8_INSN (adc, "r", "00001" R, 1, OPEN8_ISA_ALL, 0x008U, 0x0F8U)
+OPEN8_INSN (tx0, "r", "00010" R, 1, OPEN8_ISA_ALL, 0x010U, 0x0F8U)
+OPEN8_INSN (or, "r", "00011" R, 1, OPEN8_ISA_ALL, 0x018U, 0x0F8U)
+OPEN8_INSN (and, "r", "00100" R, 1, OPEN8_ISA_ALL, 0x020U, 0x0F8U)
+OPEN8_INSN (xor, "r", "00101" R, 1, OPEN8_ISA_ALL, 0x028U, 0x0F8U)
+OPEN8_INSN (rol, "r", "00110" R, 1, OPEN8_ISA_ALL, 0x030U, 0x0F8U)
+OPEN8_INSN (ror, "r", "00111" R, 1, OPEN8_ISA_ALL, 0x038U, 0x0F8U)
+OPEN8_INSN (dec, "r", "01000" R, 1, OPEN8_ISA_ALL, 0x040U, 0x0F8U)
+OPEN8_INSN (sbc, "r", "01001" R, 1, OPEN8_ISA_ALL, 0x048U, 0x0F8U)
+OPEN8_INSN (add, "r", "01010" R, 1, OPEN8_ISA_ALL, 0x050U, 0x0F8U)
+OPEN8_INSN (stp, "b", "01011" B, 1, OPEN8_ISA_ALL, 0x058U, 0x0F8U)
+OPEN8_INSN (btt, "b", "01100" B, 1, OPEN8_ISA_ALL, 0x060U, 0x0F8U)
+OPEN8_INSN (clp, "b", "01101" B, 1, OPEN8_ISA_ALL, 0x068U, 0x0F8U)
+OPEN8_INSN (t0x, "r", "01110" R, 1, OPEN8_ISA_ALL, 0x070U, 0x0F8U)
+OPEN8_INSN (cmp, "r", "01111" R, 1, OPEN8_ISA_ALL, 0x078U, 0x0F8U)
+OPEN8_INSN (psh, "r", "10000" R, 1, OPEN8_ISA_ALL, 0x080U, 0x0F8U)
+OPEN8_INSN (pop, "r", "10001" R, 1, OPEN8_ISA_ALL, 0x088U, 0x0F8U)
+OPEN8_INSN (br0, "b,s", "10010" B S, 2, OPEN8_ISA_ALL, 0x090U, 0x0F8U)
+OPEN8_INSN (br1, "b,s", "10011" B S, 2, OPEN8_ISA_ALL, 0x098U, 0x0F8U)
+// `usr' is defined below
+OPEN8_INSN (int, "n", "10101" N, 1, OPEN8_ISA_ALL, 0x0A8U, 0x0F8U)
+// `usr2' is defined below
+OPEN8_INSN (rsp, "", "10111000", 1, OPEN8_ISA_ALL, 0x0B8U, 0x0FFU)
+OPEN8_INSN (rts, "", "10111001", 1, OPEN8_ISA_ALL, 0x0B9U, 0x0FFU)
+OPEN8_INSN (rti, "", "10111010", 1, OPEN8_ISA_ALL, 0x0BAU, 0x0FFU)
+OPEN8_INSN (brk, "", "10111011", 1, OPEN8_ISA_ALL, 0x0BBU, 0x0FFU)
+OPEN8_INSN (jmp, "h", "10111100" H, 3, OPEN8_ISA_ALL, 0x0BCU, 0x0FFU)
+OPEN8_INSN (jsr, "h", "10111111" H, 3, OPEN8_ISA_ALL, 0x0BFU, 0x0FFU)
+OPEN8_INSN (upp, "e", "11000" E "0", 1, OPEN8_ISA_ALL, 0x0C0U, 0x0F9U)
+OPEN8_INSN (sta, "r,M", "11001" R M, 3, OPEN8_ISA_ALL, 0x0C8U, 0x0F8U)
+OPEN8_INSN (ldi, "r,i", "11100" R I, 2, OPEN8_ISA_ALL, 0x0E0U, 0x0F8U)
+OPEN8_INSN (lda, "r,M", "11101" R M, 3, OPEN8_ISA_ALL, 0x0E8U, 0x0F8U)
+
+/* Open8 specific mnemonics. */
+
+/* Open8 instructions that add auto-increment to existing V8 instructions. */
+OPEN8_INSN (stx, "ea", "11010" E A, 1, OPEN8_ISA_OPEN8, 0x0D0U, 0x0F8U)
+OPEN8_INSN (ldx, "ea", "11110" E A, 1, OPEN8_ISA_OPEN8, 0x0F0U, 0x0F8U)
+OPEN8_INSN (ldo, "ea,u", "11111" E A U, 2, OPEN8_ISA_OPEN8, 0x0F8U, 0x0F8U)
+OPEN8_INSN (sto, "ea,u", "11011" E A U, 2, OPEN8_ISA_OPEN8, 0x0D8U, 0x0F8U)
+
+/* Instructions that substitute for the V8 `usr' and `usr2' instructions. */
+OPEN8_INSN (dbnz, "r,s", "10100" R S, 2, OPEN8_ISA_OPEN8, 0x0A0U, 0x0F8U)
+OPEN8_INSN (mul, "r", "10110" R, 1, OPEN8_ISA_OPEN8, 0x0B0U, 0x0F8U)
+
+/* Interrupt mask instructions that are unique to the Open8. */
+OPEN8_INSN (smsk, "", "10111101", 1, OPEN8_ISA_OPEN8, 0x0BDU, 0x0FFU)
+OPEN8_INSN (gmsk, "", "10111110", 1, OPEN8_ISA_OPEN8, 0x0BEU, 0x0FFU)
+
+/*=========================non-Open8 instructions=========================*/
+#if 0
+/* These variants of the user instructions are not in the Open8. */
+OPEN8_INSN (usr, "", "10100000", 1, OPEN8_ISA_V8, 0x0A0U, 0x0FFU)
+OPEN8_INSN (usr2, "", "10110000", 1, OPEN8_ISA_V8, 0x0B0U, 0x0FFU)
+
+/* These variants of the store instructions are not in the Open8. */
+OPEN8_INSN (stx, "r", "11010" R, 1, OPEN8_ISA_V8, 0x0D0U, 0x0F8U)
+OPEN8_INSN (sto, "r,u", "11011" R U, 2, OPEN8_ISA_V8, 0x0D8U, 0x0F8U)
+
+/* These variants of the load instructions are not in the Open8. */
+OPEN8_INSN (ldx, "r", "11110" R, 1, OPEN8_ISA_V8, 0x0F0U, 0x0F8U)
+OPEN8_INSN (ldo, "r,u", "11111" R U, 2, OPEN8_ISA_V8, 0x0F8U, 0x0F8U)
+#endif
diff --git ld/ChangeLog ld/ChangeLog
index e41fc13..73bcbd6 100644
--- ld/ChangeLog
+++ ld/ChangeLog
@@ -1,3 +1,12 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * Makefile.am: Add support for Open8 MCU
+ * Makefile.in: Add support for Open8 MCU
+ * configure.tgt: Add support for Open8 MCU
+ * emulparams/open8_1.sh: Add support for Open8 MCU
+ * emultempl/open8elf.em: Add support for Open8 MCU
+ * scripttempl/open8.sc: Add support for Open8 MCU
+
2011-03-29 Alan Modra <amodra@gmail.com>
PR ld/12613
diff --git ld/Makefile.am ld/Makefile.am
index a9e76f8..fc0ff93 100644
--- ld/Makefile.am
+++ ld/Makefile.am
@@ -389,6 +389,7 @@ ALL_EMULATION_SOURCES = \
emsp430xW427.c \
enews.c \
ens32knbsd.c \
+ eopen8_1.c \
eor32.c \
eor32elf.c \
epc532macha.c \
@@ -1639,6 +1640,10 @@ ens32knbsd.c: $(srcdir)/emulparams/ns32knbsd.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/emultempl/netbsd.em \
$(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} ns32knbsd "$(tdir_ns32knbsd)"
+eopen8_1.c: $(srcdir)/emulparams/open8_1.sh $(srcdir)/emultempl/open8elf.em \
+ $(ELF_DEPS) $(srcdir)/scripttempl/open8.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} open8_1 "$(tdir_open8_1)"
eor32.c: $(srcdir)/emulparams/or32.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/or32.sc ${GEN_DEPENDS}
${GENSCRIPTS} or32 "$(tdir_or32)"
diff --git ld/Makefile.in ld/Makefile.in
index cd0e5ec..00ded1e 100644
--- ld/Makefile.in
+++ ld/Makefile.in
@@ -696,6 +696,7 @@ ALL_EMULATION_SOURCES = \
emsp430xW427.c \
enews.c \
ens32knbsd.c \
+ eopen8_1.c \
eor32.c \
eor32elf.c \
epc532macha.c \
@@ -1312,6 +1313,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emsp430xW427.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/enews.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ens32knbsd.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eopen8_1.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eor32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eor32elf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epc532macha.Po@am__quote@
@@ -3087,6 +3089,10 @@ ens32knbsd.c: $(srcdir)/emulparams/ns32knbsd.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/emultempl/netbsd.em \
$(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} ns32knbsd "$(tdir_ns32knbsd)"
+eopen8_1.c: $(srcdir)/emulparams/open8_1.sh $(srcdir)/emultempl/open8elf.em \
+ $(ELF_DEPS) $(srcdir)/scripttempl/open8.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} open8_1 "$(tdir_open8_1)"
eor32.c: $(srcdir)/emulparams/or32.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/or32.sc ${GEN_DEPENDS}
${GENSCRIPTS} or32 "$(tdir_or32)"
diff --git ld/configure.tgt ld/configure.tgt
index f574e24..2d26b1e 100644
--- ld/configure.tgt
+++ ld/configure.tgt
@@ -452,6 +452,8 @@ msp430-*-*) targ_emul=msp430x110
ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
ns32k-*-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd
;;
+open8-*-*) targ_emul=open8_1;;
+
openrisc-*-*) targ_emul=elf32openrisc ;;
or32-*-coff) targ_emul=or32 ;;
or32-*-elf) targ_emul=or32elf ;;
@@ -652,6 +654,7 @@ v850-*-*) targ_emul=v850 ;;
v850e-*-*) targ_emul=v850 ;;
v850ea-*-*) targ_emul=v850
;;
+
vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;;
vax-*-netbsdelf*) targ_emul=elf32vax
targ_extra_emuls=vaxnbsd ;;
diff --git ld/emulparams/open8_1.sh ld/emulparams/open8_1.sh
new file mode 100644
index 0000000..5795e6e
--- /dev/null
+++ ld/emulparams/open8_1.sh
@@ -0,0 +1,12 @@
+ARCH=open8
+MACHINE=
+SCRIPT_NAME=open8
+OUTPUT_FORMAT="elf32-open8"
+MAXPAGESIZE=1
+EMBEDDED=yes
+TEMPLATE_NAME=elf32
+
+TEXT_LENGTH=32K
+DATA_ORIGIN=0x8000
+DATA_LENGTH=32K
+EXTRA_EM_FILE=open8elf
diff --git ld/emultempl/open8elf.em ld/emultempl/open8elf.em
new file mode 100644
index 0000000..ec94ca3
--- /dev/null
+++ ld/emultempl/open8elf.em
@@ -0,0 +1,249 @@
+# This shell script emits a C file. -*- C -*-
+# Copyright 2006, 2007, 2008, 2009, 2011
+# Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+
+# This file is sourced from elf32.em, and defines extra open8-elf specific
+# routines.
+
+fragment <<EOF
+
+#include "elf32-open8.h"
+#include "ldctor.h"
+
+/* The fake file and it's corresponding section meant to hold
+ the linker stubs if needed. */
+
+static lang_input_statement_type *stub_file;
+static asection *open8_stub_section;
+
+/* Variables set by the command-line parameters and transfered
+ to the bfd without use of global shared variables. */
+
+static bfd_boolean open8_no_stubs = FALSE;
+static bfd_boolean open8_debug_relax = FALSE;
+static bfd_boolean open8_debug_stubs = FALSE;
+static bfd_boolean open8_replace_call_ret_sequences = TRUE;
+static bfd_vma open8_pc_wrap_around = 0x10000000;
+
+/* Transfers information to the bfd frontend. */
+
+static void
+open8_elf_set_global_bfd_parameters (void)
+{
+ elf32_open8_setup_params (& link_info,
+ stub_file->the_bfd,
+ open8_stub_section,
+ open8_no_stubs,
+ open8_debug_stubs,
+ open8_debug_relax,
+ open8_pc_wrap_around,
+ open8_replace_call_ret_sequences);
+}
+
+
+/* Makes a conservative estimate of the trampoline section size that could
+ be corrected later on. */
+
+static void
+open8_elf_${EMULATION_NAME}_before_allocation (void)
+{
+ int ret;
+
+ gld${EMULATION_NAME}_before_allocation ();
+
+ /* No stubs support for the Open8 at this time. */
+ open8_no_stubs = TRUE;
+
+ open8_elf_set_global_bfd_parameters ();
+
+ /* If generating a relocatable output file, then
+ we don't have to generate the trampolines. */
+ if (link_info.relocatable)
+ open8_no_stubs = TRUE;
+
+ if (open8_no_stubs)
+ return;
+
+ ret = elf32_open8_setup_section_lists (link_info.output_bfd, &link_info);
+
+ if (ret < 0)
+ einfo ("%X%P: can not setup the input section list: %E\n");
+
+ if (ret <= 0)
+ return;
+
+ /* Call into the BFD backend to do the real "stub"-work. */
+ if (! elf32_open8_size_stubs (link_info.output_bfd, &link_info, TRUE))
+ einfo ("%X%P: can not size stub section: %E\n");
+}
+
+/* This is called before the input files are opened. We create a new
+ fake input file to hold the stub section and generate the section itself. */
+
+static void
+open8_elf_create_output_section_statements (void)
+{
+ flagword flags;
+
+ stub_file = lang_add_input_file ("linker stubs",
+ lang_input_file_is_fake_enum,
+ NULL);
+
+ stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
+ if (stub_file->the_bfd == NULL
+ || !bfd_set_arch_mach (stub_file->the_bfd,
+ bfd_get_arch (link_info.output_bfd),
+ bfd_get_mach (link_info.output_bfd)))
+ {
+ einfo ("%X%P: can not create stub BFD %E\n");
+ return;
+ }
+
+ /* Now we add the stub section. */
+
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
+ | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
+ open8_stub_section = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
+ ".trampolines",
+ flags);
+ if (open8_stub_section == NULL)
+ goto err_ret;
+
+ open8_stub_section->alignment_power = 1;
+
+ ldlang_add_file (stub_file);
+
+ return;
+
+ err_ret:
+ einfo ("%X%P: can not make stub section: %E\n");
+ return;
+}
+
+/* Re-calculates the size of the stubs so that we won't waste space. */
+
+static void
+open8_elf_after_allocation (void)
+{
+ if (!open8_no_stubs && ! RELAXATION_ENABLED)
+ {
+ /* If relaxing, elf32_open8_size_stubs will be called from
+ elf32_open8_relax_section. */
+ if (!elf32_open8_size_stubs (link_info.output_bfd, &link_info, FALSE))
+ einfo ("%X%P: can not size stub section: %E\n");
+ }
+
+ gld${EMULATION_NAME}_after_allocation ();
+
+ /* Now build the linker stubs. */
+ if (!open8_no_stubs)
+ {
+ if (!elf32_open8_build_stubs (&link_info))
+ einfo ("%X%P: can not build stubs: %E\n");
+ }
+}
+
+
+EOF
+
+
+PARSE_AND_LIST_PROLOGUE='
+
+#define OPTION_NO_CALL_RET_REPLACEMENT 301
+#define OPTION_PMEM_WRAP_AROUND 302
+#define OPTION_NO_STUBS 303
+#define OPTION_DEBUG_STUBS 304
+#define OPTION_DEBUG_RELAX 305
+'
+
+PARSE_AND_LIST_LONGOPTS='
+ { "no-call-ret-replacement", no_argument,
+ NULL, OPTION_NO_CALL_RET_REPLACEMENT},
+ { "pmem-wrap-around", required_argument,
+ NULL, OPTION_PMEM_WRAP_AROUND},
+ { "no-stubs", no_argument,
+ NULL, OPTION_NO_STUBS},
+ { "debug-stubs", no_argument,
+ NULL, OPTION_DEBUG_STUBS},
+ { "debug-relax", no_argument,
+ NULL, OPTION_DEBUG_RELAX},
+'
+
+PARSE_AND_LIST_OPTIONS='
+ fprintf (file, _(" --no-call-ret-replacement "
+ "The relaxation machine normally will\n"
+ " "
+ " substitute two immediately following call/ret\n"
+ " "
+ " instructions by a single jump instruction.\n"
+ " "
+ " This option disables this optimization.\n"));
+ fprintf (file, _(" --debug-stubs "
+ "Used for debugging open8-ld.\n"));
+ fprintf (file, _(" --debug-relax "
+ "Used for debugging open8-ld.\n"));
+'
+
+PARSE_AND_LIST_ARGS_CASES='
+
+ case OPTION_PMEM_WRAP_AROUND:
+ {
+ /* This variable is defined in the bfd library. */
+ if ((!strcmp (optarg,"32k")) || (!strcmp (optarg,"32K")))
+ open8_pc_wrap_around = 32768;
+ else if ((!strcmp (optarg,"8k")) || (!strcmp (optarg,"8K")))
+ open8_pc_wrap_around = 8192;
+ else if ((!strcmp (optarg,"16k")) || (!strcmp (optarg,"16K")))
+ open8_pc_wrap_around = 16384;
+ else if ((!strcmp (optarg,"64k")) || (!strcmp (optarg,"64K")))
+ open8_pc_wrap_around = 0x10000;
+ else
+ return FALSE;
+ }
+ break;
+
+ case OPTION_DEBUG_STUBS:
+ open8_debug_stubs = TRUE;
+ break;
+
+ case OPTION_DEBUG_RELAX:
+ open8_debug_relax = TRUE;
+ break;
+
+ case OPTION_NO_STUBS:
+ open8_no_stubs = TRUE;
+ break;
+
+ case OPTION_NO_CALL_RET_REPLACEMENT:
+ {
+ /* This variable is defined in the bfd library. */
+ open8_replace_call_ret_sequences = FALSE;
+ }
+ break;
+'
+
+#
+# Put these extra open8-elf routines in ld_${EMULATION_NAME}_emulation
+#
+LDEMUL_BEFORE_ALLOCATION=open8_elf_${EMULATION_NAME}_before_allocation
+LDEMUL_AFTER_ALLOCATION=open8_elf_after_allocation
+LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=\
+open8_elf_create_output_section_statements
diff --git ld/scripttempl/open8.sc ld/scripttempl/open8.sc
new file mode 100644
index 0000000..5d9de07
--- /dev/null
+++ ld/scripttempl/open8.sc
@@ -0,0 +1,234 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+
+MEMORY
+{
+ text (rx) : ORIGIN = 0, LENGTH = $TEXT_LENGTH
+ data (rw!x) : ORIGIN = $DATA_ORIGIN, LENGTH = $DATA_LENGTH
+ eeprom (rw!x) : ORIGIN = 0x810000, LENGTH = 64K
+}
+
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ ${TEXT_DYNAMIC+${DYNAMIC}}
+ .hash ${RELOCATING-0} : { *(.hash) }
+ .dynsym ${RELOCATING-0} : { *(.dynsym) }
+ .dynstr ${RELOCATING-0} : { *(.dynstr) }
+ .gnu.version ${RELOCATING-0} : { *(.gnu.version) }
+ .gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
+ .gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
+
+ .rel.init ${RELOCATING-0} : { *(.rel.init) }
+ .rela.init ${RELOCATING-0} : { *(.rela.init) }
+ .rel.text ${RELOCATING-0} :
+ {
+ *(.rel.text)
+ ${RELOCATING+*(.rel.text.*)}
+ ${RELOCATING+*(.rel.gnu.linkonce.t*)}
+ }
+ .rela.text ${RELOCATING-0} :
+ {
+ *(.rela.text)
+ ${RELOCATING+*(.rela.text.*)}
+ ${RELOCATING+*(.rela.gnu.linkonce.t*)}
+ }
+ .rel.fini ${RELOCATING-0} : { *(.rel.fini) }
+ .rela.fini ${RELOCATING-0} : { *(.rela.fini) }
+ .rel.rodata ${RELOCATING-0} :
+ {
+ *(.rel.rodata)
+ ${RELOCATING+*(.rel.rodata.*)}
+ ${RELOCATING+*(.rel.gnu.linkonce.r*)}
+ }
+ .rela.rodata ${RELOCATING-0} :
+ {
+ *(.rela.rodata)
+ ${RELOCATING+*(.rela.rodata.*)}
+ ${RELOCATING+*(.rela.gnu.linkonce.r*)}
+ }
+ .rel.data ${RELOCATING-0} :
+ {
+ *(.rel.data)
+ ${RELOCATING+*(.rel.data.*)}
+ ${RELOCATING+*(.rel.gnu.linkonce.d*)}
+ }
+ .rela.data ${RELOCATING-0} :
+ {
+ *(.rela.data)
+ ${RELOCATING+*(.rela.data.*)}
+ ${RELOCATING+*(.rela.gnu.linkonce.d*)}
+ }
+ .rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
+ .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
+ .rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
+ .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
+ .rel.got ${RELOCATING-0} : { *(.rel.got) }
+ .rela.got ${RELOCATING-0} : { *(.rela.got) }
+ .rel.bss ${RELOCATING-0} : { *(.rel.bss) }
+ .rela.bss ${RELOCATING-0} : { *(.rela.bss) }
+ .rel.plt ${RELOCATING-0} : { *(.rel.plt) }
+ .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
+
+ /* Internal text space or external memory. */
+ .text ${RELOCATING-0} :
+ {
+ *(.vectors)
+ KEEP(*(.vectors))
+
+ /* For data that needs to reside in the lower 64k of progmem. */
+ *(.progmem.gcc*)
+ *(.progmem*)
+ ${RELOCATING+. = ALIGN(2);}
+
+ ${CONSTRUCTING+ __trampolines_start = . ; }
+ /* The jump trampolines for the 16-bit limited relocs will reside here. */
+ *(.trampolines)
+ *(.trampolines*)
+ ${CONSTRUCTING+ __trampolines_end = . ; }
+
+ /* For future tablejump instruction arrays for 3 byte pc devices.
+ We don't relax jump/call instructions within these sections. */
+ *(.jumptables)
+ *(.jumptables*)
+
+ /* For code that needs to reside in the lower 128k progmem. */
+ *(.lowtext)
+ *(.lowtext*)
+
+ ${CONSTRUCTING+ __ctors_start = . ; }
+ ${CONSTRUCTING+ *(.ctors) }
+ ${CONSTRUCTING+ __ctors_end = . ; }
+ ${CONSTRUCTING+ __dtors_start = . ; }
+ ${CONSTRUCTING+ *(.dtors) }
+ ${CONSTRUCTING+ __dtors_end = . ; }
+ KEEP(SORT(*)(.ctors))
+ KEEP(SORT(*)(.dtors))
+
+ /* From this point on, we don't bother about wether the insns are
+ below or above the 16 bits boundary. */
+ *(.init0) /* Start here after reset. */
+ KEEP (*(.init0))
+ *(.init1)
+ KEEP (*(.init1))
+ *(.init2) /* Clear __zero_reg__, set up stack pointer. */
+ KEEP (*(.init2))
+ *(.init3)
+ KEEP (*(.init3))
+ *(.init4) /* Initialize data and BSS. */
+ KEEP (*(.init4))
+ *(.init5)
+ KEEP (*(.init5))
+ *(.init6) /* C++ constructors. */
+ KEEP (*(.init6))
+ *(.init7)
+ KEEP (*(.init7))
+ *(.init8)
+ KEEP (*(.init8))
+ *(.init9) /* Call main(). */
+ KEEP (*(.init9))
+ *(.text)
+ ${RELOCATING+. = ALIGN(2);}
+ *(.text.*)
+ ${RELOCATING+. = ALIGN(2);}
+ *(.fini9) /* _exit() starts here. */
+ KEEP (*(.fini9))
+ *(.fini8)
+ KEEP (*(.fini8))
+ *(.fini7)
+ KEEP (*(.fini7))
+ *(.fini6) /* C++ destructors. */
+ KEEP (*(.fini6))
+ *(.fini5)
+ KEEP (*(.fini5))
+ *(.fini4)
+ KEEP (*(.fini4))
+ *(.fini3)
+ KEEP (*(.fini3))
+ *(.fini2)
+ KEEP (*(.fini2))
+ *(.fini1)
+ KEEP (*(.fini1))
+ *(.fini0) /* Infinite loop after program termination. */
+ KEEP (*(.fini0))
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > text}
+
+ .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
+ {
+ ${RELOCATING+ PROVIDE (__data_start = .) ; }
+ *(.data)
+ *(.data*)
+ *(.rodata) /* We need to include '.rodata' here, */
+ *(.rodata*) /* if gcc is used with -fdata-sections. */
+ *(.gnu.linkonce.d*)
+ ${RELOCATING+. = ALIGN(2);}
+ ${RELOCATING+ _edata = . ; }
+ ${RELOCATING+ PROVIDE (__data_end = .) ; }
+ } ${RELOCATING+ > data}
+
+ .bss ${RELOCATING-0} :${RELOCATING+ AT (ADDR (.bss))}
+ {
+ ${RELOCATING+ PROVIDE (__bss_start = .) ; }
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+ ${RELOCATING+ PROVIDE (__bss_end = .) ; }
+ } ${RELOCATING+ > data}
+
+ ${RELOCATING+ __data_load_start = LOADADDR(.data); }
+ ${RELOCATING+ __data_load_end = __data_load_start + SIZEOF(.data); }
+
+ /* Global data not cleared after reset. */
+ .noinit ${RELOCATING-0}:
+ {
+ ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
+ *(.noinit*)
+ ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
+ ${RELOCATING+ _end = . ; }
+ ${RELOCATING+ PROVIDE (__heap_start = .) ; }
+ } ${RELOCATING+ > data}
+
+ .eeprom ${RELOCATING-0}:
+ {
+ *(.eeprom*)
+ ${RELOCATING+ __eeprom_end = . ; }
+ } ${RELOCATING+ > eeprom}
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+
+ /* DWARF 1. */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+
+ /* GNU DWARF 1 extensions. */
+ .debug_srcinfo 0 : { *(.debug_srcinfo .zdebug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames .zdebug_sfnames) }
+
+ /* DWARF 1.1 and DWARF 2. */
+ .debug_aranges 0 : { *(.debug_aranges .zdebug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames .zdebug_pubnames) }
+
+ /* DWARF 2. */
+ .debug_info 0 : { *(.debug_info${RELOCATING+ .gnu.linkonce.wi.*} .zdebug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev .zdebug_abbrev) }
+ .debug_line 0 : { *(.debug_line .zdebug_line) }
+ .debug_frame 0 : { *(.debug_frame .zdebug_frame) }
+ .debug_str 0 : { *(.debug_str .zdebug_str) }
+ .debug_loc 0 : { *(.debug_loc .zdebug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo .zdebug_macinfo) }
+}
+EOF
+
diff --git opcodes/ChangeLog opcodes/ChangeLog
index 734f824..570e70d 100644
--- opcodes/ChangeLog
+++ opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2011-03-29 Kirk Hays <khays@hayshaus.com>
+
+ * Makefile.am: Add support for Open8 MCU
+ * Makefile.in: Add support for Open8 MCU
+ * configure: Add support for Open8 MCU
+ * configure.in: Add support for Open8 MCU
+ * disassemble.c: Add support for Open8 MCU
+ * open8-dis.c: Add support for Open8 MCU
+
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
diff --git opcodes/Makefile.am opcodes/Makefile.am
index 668085c..21b617d 100644
--- opcodes/Makefile.am
+++ opcodes/Makefile.am
@@ -173,6 +173,7 @@ TARGET_LIBOPCODES_CFILES = \
mt-ibld.c \
mt-opc.c \
ns32k-dis.c \
+ open8-dis.c \
openrisc-asm.c \
openrisc-desc.c \
openrisc-dis.c \
diff --git opcodes/Makefile.in opcodes/Makefile.in
index 8928b1b..8b4c41b 100644
--- opcodes/Makefile.in
+++ opcodes/Makefile.in
@@ -443,6 +443,7 @@ TARGET_LIBOPCODES_CFILES = \
mt-ibld.c \
mt-opc.c \
ns32k-dis.c \
+ open8-dis.c \
openrisc-asm.c \
openrisc-desc.c \
openrisc-dis.c \
@@ -814,6 +815,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-ibld.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ns32k-dis.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/open8-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/openrisc-asm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/openrisc-desc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/openrisc-dis.Plo@am__quote@
diff --git opcodes/configure opcodes/configure
index 83ac9ae..d4ebdb2 100755
--- opcodes/configure
+++ opcodes/configure
@@ -12447,6 +12447,7 @@ if test x${all_targets} = xfalse ; then
bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
+ bfd_open8_arch) ta="$ta open8-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;;
diff --git opcodes/configure.in opcodes/configure.in
index 0518781..e0ae203 100644
--- opcodes/configure.in
+++ opcodes/configure.in
@@ -261,6 +261,7 @@ if test x${all_targets} = xfalse ; then
bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
+ bfd_open8_arch) ta="$ta open8-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;;
diff --git opcodes/disassemble.c opcodes/disassemble.c
index 0fb35ac..660c1bf 100644
--- opcodes/disassemble.c
+++ opcodes/disassemble.c
@@ -64,6 +64,7 @@
#define ARCH_mt
#define ARCH_msp430
#define ARCH_ns32k
+#define ARCH_open8
#define ARCH_openrisc
#define ARCH_or32
#define ARCH_pdp11
@@ -307,6 +308,11 @@ disassembler (abfd)
disassemble = print_insn_mn10300;
break;
#endif
+#ifdef ARCH_open8
+ case bfd_arch_open8:
+ disassemble = print_insn_open8;
+ break;
+#endif
#ifdef ARCH_openrisc
case bfd_arch_openrisc:
disassemble = print_insn_openrisc;
diff --git opcodes/open8-dis.c opcodes/open8-dis.c
new file mode 100644
index 0000000..4a08f82
--- /dev/null
+++ opcodes/open8-dis.c
@@ -0,0 +1,306 @@
+/* Disassemble Open8 instructions.
+ Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2008, 2010,2011
+ Free Software Foundation, Inc.
+
+ Contributed by Kirk Hays <khays@hayshaus.com>
+
+ This file is part of libopcodes.
+
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include <assert.h>
+#include "sysdep.h"
+#include "dis-asm.h"
+#include "opintl.h"
+#include "libiberty.h"
+
+struct open8_opcodes_s
+{
+ char *name;
+ char *constraints;
+ char *opcode;
+ int insn_size; /* In bytes. */
+ int isa;
+ unsigned long long opcode_bits;
+ unsigned long long opcode_mask;
+};
+
+#define OPEN8_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN, MASK) \
+ {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN, MASK},
+
+const struct open8_opcodes_s open8_opcodes[] =
+ {
+#include "opcode/open8.h"
+ {NULL, NULL, NULL, 0, 0, 0, 0}
+ };
+
+static const char * comment_start = "0x";
+
+static int
+open8_operand (unsigned long long insn,
+ int constraint,
+ char *buf,
+ char *comment,
+ int *sym,
+ bfd_vma *sym_addr)
+{
+ int ok = 1;
+ *sym = 0;
+
+ switch (constraint)
+ {
+ /* Any register operand. */
+ case 'r':
+ sprintf (buf, "r%d", (int) ((insn & REG_MASK) >> REG_SHIFT));
+ break;
+
+ /* Even numbered register. */
+ case 'e':
+ sprintf (buf, "r%d", (int) ((insn & EREG_MASK) >> EREG_SHIFT));
+ break;
+
+ /* Unsigned offset expression, 8 bits. */
+ case 'u':
+ sprintf (buf, "%u", (int) ((insn & U_MASK) >> U_SHIFT));
+ break;
+
+ /* Signed pc-relative offset expression, 8 bits. */
+ case 's':
+ {
+ int8_t t = ((insn & S_MASK) >> S_SHIFT);
+ sprintf (buf, "%d", (int)t); /* Propagate sign bit. */
+ }
+ break;
+
+ /* Immediate value expression, signed, 8 bits. */
+ case 'i':
+ {
+ int8_t t = ((insn & I_MASK) >> I_SHIFT);
+ sprintf (buf, "%d", (int)t); /* Propagate sign bit. */
+ }
+ break;
+
+ /* Immediate value expression, 3 bits. */
+ case 'n':
+ sprintf (buf, "%u", (int) ((insn & N_MASK) >> N_SHIFT));
+ break;
+
+ /* Immediate value expression, 3 bits, indexing PSR. */
+ case 'b':
+ sprintf (buf, "%u", (int) ((insn & B_MASK) >> B_SHIFT));
+ break;
+
+ /* Memory reference, 16 bits, unsigned. */
+ case 'M':
+ *sym = 1;
+ *sym_addr = (bfd_vma) ((insn & M_MASK) >> M_SHIFT);
+ sprintf (buf, "%#lx", (unsigned long) *sym_addr);
+ strcpy (comment, comment_start);
+ break;
+
+ /* JSR/JMP reference, 16 bits, unsigned. */
+ case 'h':
+ *sym = 1;
+ *sym_addr = (bfd_vma) ((insn & H_MASK) >> H_SHIFT);
+ sprintf (buf, "%#lx", (unsigned long) *sym_addr);
+ strcpy (comment, comment_start);
+ break;
+
+ /* JSR/JMP reference, 16 bits, unsigned, in composite branch. */
+ case 'H':
+ *sym = 1;
+ *sym_addr = (bfd_vma) ((insn & BIG_H_MASK) >> BIG_H_SHIFT);
+ sprintf (buf, "%#lx", (unsigned long) *sym_addr);
+ strcpy (comment, comment_start);
+ break;
+
+ /* autoincrement operator. */
+ case 'a':
+ if (insn & A_MASK)
+ sprintf (buf, "%s", "++");
+ break;
+
+ /* syntactic sugar - comma. */
+ case ',':
+ sprintf (buf, "%s", ",");
+ break;
+
+ default:
+ sprintf (buf, "??");
+ fprintf (stderr, _("unknown constraint `%c'"), constraint);
+ ok = 0;
+ }
+
+ return ok;
+}
+
+static unsigned long long
+open8_dis_opcode (bfd_vma addr, disassemble_info *info)
+{
+ bfd_byte buffer[sizeof (unsigned long long)];
+ int status;
+
+ int readsize = sizeof buffer;
+
+ /* Make sure we don't try to read past the end of the section. */
+ if (addr + readsize >= info->section->size)
+ {
+ readsize = info->section->size - addr;
+ memset (buffer, 0, sizeof buffer);
+ }
+
+ status = info->read_memory_func (addr, buffer, readsize, info);
+
+ if (status == 0)
+ return bfd_getl64 (buffer);
+
+ info->memory_error_func (status, addr, info);
+ return -1;
+}
+
+
+int
+print_insn_open8 (bfd_vma addr, disassemble_info *info)
+{
+ unsigned long long insn;
+ const struct open8_opcodes_s *opcode;
+ void *stream = info->stream;
+ fprintf_ftype prin = info->fprintf_func;
+ int ok = 0;
+ char op1[20], op2[20], op3[20], comment1[40], comment2[40], comment3[40];
+ int comma1 = 0, comma2 = 0;
+ int sym_op1 = 0, sym_op2 = 0, sym_op3 = 0;
+ bfd_vma sym_addr1, sym_addr2, sym_addr3;
+
+ if (info->symtab_size == 0)
+ comment_start = " ";
+
+ insn = open8_dis_opcode (addr, info);
+
+ /* Scan the opcode descriptors, looking for an opcode match. */
+ for (opcode = open8_opcodes;
+ opcode->name;
+ opcode++)
+ {
+ /* If the memory anded with the mask matches required opcode bits,
+ then we have a match. */
+ if ((insn & opcode->opcode_mask) == opcode->opcode_bits)
+ {
+ break;
+ }
+ }
+
+ op1[0] = 0;
+ op2[0] = 0;
+ op3[0] = 0;
+ comment1[0] = 0;
+ comment2[0] = 0;
+ comment3[0] = 0;
+
+ /* Parse the binary value using the constraints. */
+ if (opcode->name)
+ {
+ char *op = opcode->constraints;
+
+ ok = 1;
+
+ if (*op)
+ {
+ /* Grab the first operand. */
+ ok = open8_operand (insn, *op++, op1, comment1, &sym_op1, &sym_addr1);
+
+ /* Note a comma. */
+ if (ok && *op == ',')
+ {
+ comma1++;
+ op++;
+ }
+
+ /* Grab the second operand. */
+ if (ok && *op)
+ {
+ ok = open8_operand (insn, *op++, op2,
+ *comment1 ? comment2 : comment1,
+ &sym_op2, &sym_addr2);
+ }
+
+ /* Note a comma. */
+ if (ok && *op == ',')
+ {
+ comma2++;
+ op++;
+ }
+
+ /* Grab the third operand. */
+ if (ok && *op)
+ {
+ ok = open8_operand (insn, *op++, op3,
+ *comment1 ? (*comment2
+ ? comment3
+ : comment2)
+ : comment1,
+ &sym_op3, &sym_addr3);
+ }
+
+ }
+ }
+
+ if (!ok)
+ {
+ /* Unknown opcode, or invalid combination of operands. */
+ sprintf (op1, "0x%04x", (unsigned int)insn);
+ op2[0] = 0;
+ sprintf (comment1, "????");
+ comment2[0] = 0;
+ }
+
+ (*prin) (stream, "%s", ok ? opcode->name : ".word");
+
+ if (*op1)
+ (*prin) (stream, "\t%s", op1);
+
+ if (comma1)
+ (*prin) (stream, "%s",",");
+
+ if (*op2)
+ (*prin) (stream, " %s", op2);
+
+ if (comma2)
+ (*prin) (stream, "%s",",");
+
+ if (*op3)
+ (*prin) (stream, " %s", op3);
+
+ if (*comment1)
+ (*prin) (stream, "\t; %s", comment1);
+
+ if (sym_op1)
+ info->print_address_func (sym_addr1, info);
+
+ if (*comment2)
+ (*prin) (stream, " %s", comment2);
+
+ if (sym_op2)
+ info->print_address_func (sym_addr2, info);
+
+ if (*comment3)
+ (*prin) (stream, " %s", comment3);
+
+ if (sym_op3)
+ info->print_address_func (sym_addr3, info);
+
+ return opcode->insn_size;
+}