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[PATCH 5/9] MIPS/GAS: Split off MIPS IV branch-likely tests

From: "Maciej W. Rozycki" <macro at codesourcery dot com>
To: binutils at sourceware dot org
Cc: Richard Sandiford <rdsandiford at googlemail dot com>, Catherine Moore <clm at codesourcery dot com>, gnu-mips-sgxx at codesourcery dot com
Date: Fri, 2 Jul 2010 17:14:19 +0100 (BST)
Subject: [PATCH 5/9] MIPS/GAS: Split off MIPS IV branch-likely tests
Hi,

 This is a change that moves MIPS IV branch-likely tests to a separate 
test case.  While unlike with MIPS II branch-likely tests it does not make 
a functional difference for the currently supported platforms, it is 
required for a clean support for the microMIPS ASE tests and is also 
consistent with the former change.

2010-07-02  Maciej W. Rozycki  <macro@codesourcery.com>

	gas/testsuite/
	* gas/mips/mips4-fp.d, gas/mips/mips4-fp.s: Remove checks for
	branch-likely instructions and place them...
	* gas/mips/mips4-fp.l: Update accordingly.
	* gas/mips/mips4-branch-likely.d, gas/mips/mips4-branch-likely.s:
	... in this new test.
	* gas/mips/mips4-branch-likely.l: New stderr output for the new
	test.
	* gas/mips/mips.exp (mips4-branch-likely): Run a dump test and
	list tests matching branch-likely and mips4-fp tests
	appropriately.

 OK to commit?

  Maciej

binutils-250178.diff
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips.exp	2010-06-30 14:18:39.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp	2010-06-30 14:28:37.000000000 +0100
@@ -484,6 +484,10 @@
     run_dump_test_arches "mips4-fp"	[mips_arch_list_matching mips4]
     run_list_test_arches "mips4-fp" "-32 -msoft-float" \
 					[mips_arch_list_matching mips4]
+    run_dump_test_arches "mips4-branch-likely" \
+					[mips_arch_list_matching mips4]
+    run_list_test_arches "mips4-branch-likely" "-32 -msoft-float" \
+					[mips_arch_list_matching mips4]
     run_dump_test_arches "mips5"	[mips_arch_list_matching mips5]
     run_dump_test "mul"
 
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.d
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.d	2010-06-30 01:00:00.000000000 +0100
@@ -0,0 +1,13 @@
+#objdump: -dr --prefix-addresses
+#name: MIPS mips4 branch-likely instructions
+
+# Test mips4 branch-likely instructions.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> bc1fl	\$fcc1,0+0000 <text_label>
+[0-9a-f]+ <[^>]*> nop
+[0-9a-f]+ <[^>]*> bc1tl	\$fcc2,0+0000 <text_label>
+[0-9a-f]+ <[^>]*> nop
+	\.\.\.
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.l
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.l	2010-06-30 01:00:00.000000000 +0100
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.s
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-branch-likely.s	2010-06-30 01:00:00.000000000 +0100
@@ -0,0 +1,9 @@
+# Source file used to test -mips4 branch-likely instructions.
+
+	.text
+text_label:
+	bc1fl	$fcc1,text_label
+	bc1tl	$fcc2,text_label
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	8
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.d
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips4-fp.d	2010-06-30 14:06:53.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.d	2010-06-30 14:28:37.000000000 +0100
@@ -10,12 +10,8 @@
 [0-9a-f]+ <[^>]*> nop
 [0-9a-f]+ <[^>]*> bc1f	\$fcc1,0+0000 <text_label>
 [0-9a-f]+ <[^>]*> nop
-[0-9a-f]+ <[^>]*> bc1fl	\$fcc1,0+0000 <text_label>
-[0-9a-f]+ <[^>]*> nop
 [0-9a-f]+ <[^>]*> bc1t	\$fcc1,0+0000 <text_label>
 [0-9a-f]+ <[^>]*> nop
-[0-9a-f]+ <[^>]*> bc1tl	\$fcc2,0+0000 <text_label>
-[0-9a-f]+ <[^>]*> nop
 [0-9a-f]+ <[^>]*> c.f.d	\$f4,\$f6
 [0-9a-f]+ <[^>]*> c.f.d	\$fcc1,\$f4,\$f6
 [0-9a-f]+ <[^>]*> ldxc1	\$f2,a0\(a1\)
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.l
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips4-fp.l	2010-05-12 22:07:14.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.l	2010-06-30 14:28:37.000000000 +0100
@@ -1,35 +1,33 @@
 .*: Assembler messages:
 .*:4: Error: opcode not supported on this processor: .* \(.*\) `bc1f text_label'
 .*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1f \$fcc1,text_label'
-.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
-.*:7: Error: opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
-.*:8: Error: opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'
-.*:9: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
-.*:10: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
-.*:11: Error: opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
-.*:12: Error: opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
-.*:13: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
-.*:15: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
-.*:16: Error: opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
-.*:17: Error: opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
-.*:18: Error: opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
-.*:19: Error: opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
-.*:20: Error: opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
-.*:21: Error: opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
-.*:22: Error: opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
-.*:23: Error: opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
-.*:24: Error: opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
-.*:25: Error: opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
-.*:26: Error: opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
-.*:27: Error: opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
-.*:28: Error: opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
-.*:29: Error: opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
-.*:30: Error: opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
-.*:31: Error: opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
-.*:33: Error: opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
-.*:34: Error: opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
-.*:35: Error: opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
-.*:36: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
-.*:37: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
-.*:38: Error: opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
-.*:39: Error: opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
+.*:8: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
+.*:9: Error: opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
+.*:10: Error: opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
+.*:11: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
+.*:13: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
+.*:14: Error: opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
+.*:15: Error: opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
+.*:16: Error: opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
+.*:17: Error: opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
+.*:18: Error: opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
+.*:19: Error: opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
+.*:20: Error: opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
+.*:21: Error: opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
+.*:22: Error: opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
+.*:23: Error: opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
+.*:24: Error: opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
+.*:25: Error: opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
+.*:26: Error: opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
+.*:27: Error: opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
+.*:28: Error: opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
+.*:29: Error: opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
+.*:31: Error: opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
+.*:32: Error: opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
+.*:33: Error: opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
+.*:34: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
+.*:35: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
+.*:36: Error: opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
+.*:37: Error: opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.s
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips4-fp.s	2010-05-12 22:07:14.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips4-fp.s	2010-06-30 14:28:37.000000000 +0100
@@ -3,9 +3,7 @@
 text_label:	
 	bc1f	text_label
 	bc1f	$fcc1,text_label
-	bc1fl	$fcc1,text_label
 	bc1t	$fcc1,text_label
-	bc1tl	$fcc2,text_label
 	c.f.d	$f4,$f6
 	c.f.d	$fcc1,$f4,$f6
 	ldxc1	$f2,$4($5)
Follow-Ups:
- Re: [PATCH 5/9] MIPS/GAS: Split off MIPS IV branch-likely tests
  - From: Richard Sandiford
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