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Re: [PATCH] Added validations for undefined and unpredictable ARM loads/stores


On 10/02/10 19:39, Daniel Gutson wrote:
The attached patch adds validations for the invalid usages of PC and SP
registers on loads/stores, both Thumb and ARM.
I went through the ARMARM checking for UNDEFINED and UNPREDICTABLE
situations related to these instructions and registers.

The general goals I followed were:
- try to modify as specific functionalities as possible, in order to
avoid collateral effects (by inadvertently changing other insns). The
earliest place I found was the operands parsing validation, which are
led by the insns table. (this is, I ensured that my change applies to a
single insn).
- at the same time, I tried to provide "generic means" reusable from
many places.

In order to achieve these goals, this patch performs the following changes:
- I added new operand validators: OP_RRnpcsp (avoid PC and SP) and
OP_oRRnpcsp (optional counterpart of the former).
- Since some operand validation rules differ between ARM and THUMB, I
added the ability to specify different operand validators for the same
operand (one for ARM and another for THUMB); I did this by changing the
operand type from char to int, and using 16 bits for ARM and 16 for
THUMB; a new macro (MIX_ARM_THUMB_OPERANDS) mixes two given operands.
Some (mixed) operands were very common, so I added them as a shortcut:
OP_RRnpc_npcsp (mix between OP_RRnpc for ARM, and OP_RRnpcsp for THUMB),
and its optional counterpart.
- Some validations were inside the addressing modes, not reachable from
the operands parser, so I changed some encode_xxx_addr functions in
order to add them. I also opted this since the encoding functions did
some validations already, so I wanted to be consistent with that.
- finally, most of the changes went to the insns table, as I wanted to,
minimizing changes to functions that encode many mnemonics (e.g. *_ldst).

I tested this by running the following test suites:
* binutils
* gas (with added test case)
* ld

Please let me know if OK to commit.

Thanks,
Daniel.

ChangeLog:
gas/
* config/tc-arm.c (asm_opcode): operands type
change.
(BAD_PC_ADDRESSING): New macro message.
(BAD_PC_WRITEBACK): Likewise.
(MIX_ARM_THUMB_OPERANDS): New macro.
(operand_parse_code): Added enum values.
(parse_operands): Added thumb/arm distinction,
plus new enum values handling.
(encode_arm_addr_mode_2): Validations enhanced.
(encode_arm_addr_mode_3): Likewise.
(do_rm_rd_rn): Likewise.
(encode_thumb32_addr_mode): Likewise.
(do_t_ldrex): Likewise.
(do_t_ldst): Likewise.
(do_t_strex): Likewise.
(md_assemble): Call parse_operands with
a new parameter.
(OPS_1): New macro.
(OPS_2): Likewise.
(OPS_3): Likewise.
(OPS_4): Likewise.
(OPS_5): Likewise.
(OPS_6): Likewise.
(insns): Updated insns operands.

gas/testsuite/
* gas/arm/sp-pc-validations-bad.d: New testcase.
* gas/arm/sp-pc-validations-bad.l: New file.
* gas/arm/sp-pc-validations-bad.s: New file.
* gas/arm/sp-pc-validations-bad-t.d: New testcase.
* gas/arm/sp-pc-validations-bad-t.l: New file.
* gas/arm/sp-pc-validations-bad-t.s: New file.
* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
* gas/arm/sp-pc-usage-t.s: Likewise.
* gas/arm/unpredictable.d: Likewise.
* gas/arm/unpredictable.s: Likewise.
* gas/arm/thumb2_bcond.d: Added test.
* gas/arm/thumb2_bcond.s: Likewise.



OK.


R.


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