Re: Handle extrdi and large register rotate values

[Peter Bergner <bergner at vnet dot ibm dot com>]

On Fri, 2009-08-28 at 10:09 +0930, Alan Modra wrote:
> On Fri, Aug 28, 2009 at 09:45:01AM +0930, Alan Modra wrote:
> > On Thu, Aug 27, 2009 at 05:29:36PM -0500, Peter Bergner wrote:
> > > -{"extrdi",   4,	PPC64,	"rldicl %0,%1,(%2)+(%3),64-(%2)"},
> > > -{"extrdi.",  4,	PPC64,	"rldicl. %0,%1,(%2)+(%3),64-(%2)"},
> > > +{"extrdi",   4,	PPC64,	"rldicl %0,%1,((%2)+(%3))&0x3f,64-(%2)"},
> > > +{"extrdi.",  4,	PPC64,	"rldicl. %0,%1,((%2)+(%3))&0x3f,64-(%2)"},
> > > 
> > > but that would mean updating quite a few other ops similarly.  Is the
> > > following patch acceptable to catch them all in one shot or do you
> > > prefer a change like the above?
> > 
> > I prefer this.  For your other patch, you'd need to argue that the
> > current warning on plain rldicl shift counts isn't useful.
> 
> Hmm, extrdi ra,rs,n,b has number of bits n = [1,64] and bit position
> b = [0,63].  Also, the bit field ends at bit 63, so n+b = [1,64]
> So I think you should have
> 
> {"extrdi",   4,	PPC64,	"rldicl %0,%1,((%2)+(%3))&((%2)+(%3)<>64),64-(%2)"},

This wouldn't allow something like:

  extrdi 10,24,6,60   (ie, want [60,61,62,63,0,1] bits)

which mine would correctly translate to:

  rldicl 10,24,2,58

Do we even want to support extrdi's like that or not?  If not, I'll whip
up a patch using your patch idea and add some testcases.

I'll note extrwi uses the n+b <> 32 thingy.

Peter