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Re: A question about ld relaxation.
- From: bjgnu at sunnorth dot com dot cn
- To: binutils at sourceware dot org
- Date: Fri, 25 May 2007 12:32:21 +0800
- Subject: Re: A question about ld relaxation.
Hi Nick, thanks for your detailed explanations.
> > 1, Can ld relax direct jump instructions?
>
> During a final link, for architectures that have different sized direct
> jump instructions, then yes it is possible. (Note: Just because it is
> possible, this does not mean that the code to perform this relaxation
> has actually been written).
During a final link (not the relaxation stage), can i replace a
instruction
to a different sized one? And i modify section->size, modify section
contents,
and modify global & local symbols in this section. Is this dangerous in
the
final link stage?
I have some more questions.
2, If i write a pare of functions bfd_get48, bfd_put48 and handle the big
&
little endians properly, can binutils support 48-bit instructions?
3, Suppose the target has a pare of absolute addresssing load
instructions.
load32 (32-bit inst which has 24 bits immediate value) and,
load48 (48-bit inst which has 32 bits immediate value).
For this instruction:
load32 var_x
(NOTE: the instructions are in .text section, and all the variables are in
the .data section, and this is a absolute addressing). Then i can't relax
'load32 var_x' to 'load48 var_x', right?
Because in the _bfd_relax_section hook, it seems that i can only modify
the
section passed in, and here i can just modify the contents in .text
section,
and can not modify the contents in .data. Is that right?
Even if i can modify .data section, i will see whether .data section is
arranged
before or after .text section. And then decide wether or not to modify
contents
in .data section. (if .data section is before .text, then any
modifications on
.text will not affect the absolute addressing symbols in .data section.
and we need not modify it.)
If it can do the relaxation, does any target implement this?
4, For the jump and branch instructions, does it also have the same
problem?
Suppose the target has a pare of absolute addressing jump instructions for
function call.
jump32 fun (32-bit inst that has 24 bits immediate value), and
jump48 fun (48-bit inst that has 32 bits immediate value).
For this instruction:
jump32 fun
(NOTE: the current inst 'jump32 fun' is in .text section, and 'fun' is in
another section.
suppose .xxx section)
During relaxation stage, can we relax 'jump32 fun' to 'jump48 fun', and
modify .xxx section?
Best regards,
Qinwei