Overlapping operands in ARM mul and mla instructions

[Mark Shinwell <shinwell at codesourcery dot com>]

ARMv6 upwards permits overlapping operands to mul and mla
instructions in a way that previous architecture versions did not.
This patch adjusts gas behaviour accordingly.

Tested with cross to arm-none-eabi.

OK to apply?

Mark

--


2007-03-15  Mark Shinwell  <shinwell@codesourcery.com>

	gas/
	* config/tc-arm.c (do_mul): Don't warn about overlapping
	Rd and Rm operands when assembling for v6 or above.
	Correctly capitalize register names in the messages.
	(do_mlas): Likewise.  Delete spurious blank line.

	gas/testsuite/
	* gas/arm/mul-overlap.s: New.
	* gas/arm/mul-overlap.d: New.
	* gas/arm/mul-overlap.l: New.
	* gas/arm/mul-overlap-v6.s: New.
	* gas/arm/mul-overlap-v6.d: New.


Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.314
diff -U3 -p -r1.314 tc-arm.c
--- gas/config/tc-arm.c 15 Mar 2007 12:11:49 -0000      1.314
+++ gas/config/tc-arm.c 15 Mar 2007 13:55:33 -0000
@@ -7051,17 +7051,16 @@ do_lstc (void)
 static void
 do_mlas (void)
 {
-  /* This restriction does not apply to mls (nor to mla in v6, but
-     that's hard to detect at present).         */
+  /* This restriction does not apply to mls (nor to mla in v6 or later).  */
   if (inst.operands[0].reg == inst.operands[1].reg
+      && !ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6)
       && !(inst.instruction & 0x00400000))
-    as_tsktsk (_("rd and rm should be different in mla"));
+    as_tsktsk (_("Rd and Rm should be different in mla"));

   inst.instruction |= inst.operands[0].reg << 16;
   inst.instruction |= inst.operands[1].reg;
   inst.instruction |= inst.operands[2].reg << 8;
   inst.instruction |= inst.operands[3].reg << 12;
-
 }

 static void
@@ -7169,8 +7168,9 @@ do_mul (void)
   inst.instruction |= inst.operands[1].reg;
   inst.instruction |= inst.operands[2].reg << 8;

-  if (inst.operands[0].reg == inst.operands[1].reg)
-    as_tsktsk (_("rd and rm should be different in mul"));
+  if (inst.operands[0].reg == inst.operands[1].reg
+      && !ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6))
+    as_tsktsk (_("Rd and Rm should be different in mul"));
 }

 /* Long Multiply Parser
Index: gas/testsuite/gas/arm/mul-overlap-v6.s
===================================================================
--- gas/testsuite/gas/arm/mul-overlap-v6.s
+++ gas/testsuite/gas/arm/mul-overlap-v6.s
@@ -0,0 +1,9 @@
+	.arch	armv6
+	.text
+	.align	2
+	.global	foo
+	.type	foo, %function
+foo:
+	mul	r0, r0, r0
+	mla	r0, r0, r1, r2
+	bx	lr
Index: gas/testsuite/gas/arm/mul-overlap.d
===================================================================
--- gas/testsuite/gas/arm/mul-overlap.d
+++ gas/testsuite/gas/arm/mul-overlap.d
@@ -0,0 +1,2 @@
+# name: Overlapping multiplication operands without architecture specification
+# error-output: mul-overlap.l
Index: gas/testsuite/gas/arm/mul-overlap.l
===================================================================
--- gas/testsuite/gas/arm/mul-overlap.l
+++ gas/testsuite/gas/arm/mul-overlap.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:6: Rd and Rm should be different in mul
+[^:]*:7: Rd and Rm should be different in mla
Index: gas/testsuite/gas/arm/mul-overlap.s
===================================================================
--- gas/testsuite/gas/arm/mul-overlap.s
+++ gas/testsuite/gas/arm/mul-overlap.s
@@ -0,0 +1,8 @@
+	.text
+	.align	2
+	.global	foo
+	.type	foo, %function
+foo:
+	mul	r0, r0, r0
+	mla	r0, r0, r1, r2
+	bx	lr
Index: gas/testsuite/gas/arm/mul-overlap-v6.d
===================================================================
--- gas/testsuite/gas/arm/mul-overlap-v6.d
+++ gas/testsuite/gas/arm/mul-overlap-v6.d
@@ -0,0 +1,9 @@
+# name: Overlapping multiplication operands for ARMv6
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> e0000090 	mul	r0, r0, r0
+0[0-9a-f]+ <[^>]+> e0202190 	mla	r0, r0, r1, r2
+0[0-9a-f]+ <[^>]+> e12fff1e 	bx	lr