This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Fix encoding of CPU32 tbls insns
- From: Andreas Schwab <schwab at suse dot de>
- To: binutils at sourceware dot org
- Date: Tue, 26 Dec 2006 15:07:28 +0100
- Subject: Fix encoding of CPU32 tbls insns
The CPU32 tbls insns encode the signed bit in bit 11 of the second word,
but the opcode table was using 2<<11 (which overflows into the destination
register field). Fixed and added a test for all CPU32 specific insns.
Andreas.
2006-12-26 Andreas Schwab <schwab@suse.de>
gas/testsuite/:
* gas/m68k/cpu32.[sd]: New test.
* gas/m68k/all.exp: Run it.
opcodes/:
* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
--- gas/testsuite/gas/m68k/all.exp.~1.9.~ 2006-11-26 10:54:32.000000000 +0100
+++ gas/testsuite/gas/m68k/all.exp 2006-12-26 14:20:30.000000000 +0100
@@ -41,6 +41,7 @@ if [istarget m68*-*-*] then {
run_dump_test mcf-fpu
run_dump_test mcf-trap
run_dump_test arch-cpu-1
+ run_dump_test cpu32
set testname "68000 operands"
gas_run "operands.s" "-m68000" "2>err.out"
--- /dev/null 2006-11-25 20:28:17.000000000 +0100
+++ gas/testsuite/gas/m68k/cpu32.d 2006-12-26 14:46:07.000000000 +0100
@@ -0,0 +1,34 @@
+#name: cpu32
+#objdump: -d
+#as: -mcpu32
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 0-9a-f]+: 4afa bgnd
+[ 0-9a-f]+: f800 2001 tblub %d0,%d1,%d2
+[ 0-9a-f]+: f800 2041 tbluw %d0,%d1,%d2
+[ 0-9a-f]+: f800 2081 tblul %d0,%d1,%d2
+[ 0-9a-f]+: f800 2401 tblunb %d0,%d1,%d2
+[ 0-9a-f]+: f800 2441 tblunw %d0,%d1,%d2
+[ 0-9a-f]+: f800 2481 tblunl %d0,%d1,%d2
+[ 0-9a-f]+: f800 2801 tblsb %d0,%d1,%d2
+[ 0-9a-f]+: f800 2841 tblsw %d0,%d1,%d2
+[ 0-9a-f]+: f800 2881 tblsl %d0,%d1,%d2
+[ 0-9a-f]+: f800 2c01 tblsnb %d0,%d1,%d2
+[ 0-9a-f]+: f800 2c41 tblsnw %d0,%d1,%d2
+[ 0-9a-f]+: f800 2c81 tblsnl %d0,%d1,%d2
+[ 0-9a-f]+: f810 1100 tblub %a0@,%d1
+[ 0-9a-f]+: f810 1140 tbluw %a0@,%d1
+[ 0-9a-f]+: f810 1180 tblul %a0@,%d1
+[ 0-9a-f]+: f810 1500 tblunb %a0@,%d1
+[ 0-9a-f]+: f810 1540 tblunw %a0@,%d1
+[ 0-9a-f]+: f810 1580 tblunl %a0@,%d1
+[ 0-9a-f]+: f810 1900 tblsb %a0@,%d1
+[ 0-9a-f]+: f810 1940 tblsw %a0@,%d1
+[ 0-9a-f]+: f810 1980 tblsl %a0@,%d1
+[ 0-9a-f]+: f810 1d00 tblsnb %a0@,%d1
+[ 0-9a-f]+: f810 1d40 tblsnw %a0@,%d1
+[ 0-9a-f]+: f810 1d80 tblsnl %a0@,%d1
--- /dev/null 2006-11-25 20:28:17.000000000 +0100
+++ gas/testsuite/gas/m68k/cpu32.s 2006-12-26 14:58:54.000000000 +0100
@@ -0,0 +1,26 @@
+ # cpu32 specific insns
+ bgnd
+ tblub %d0,%d1,%d2
+ tbluw %d0,%d1,%d2
+ tblul %d0,%d1,%d2
+ tblunb %d0,%d1,%d2
+ tblunw %d0,%d1,%d2
+ tblunl %d0,%d1,%d2
+ tblsb %d0,%d1,%d2
+ tblsw %d0,%d1,%d2
+ tblsl %d0,%d1,%d2
+ tblsnb %d0,%d1,%d2
+ tblsnw %d0,%d1,%d2
+ tblsnl %d0,%d1,%d2
+ tblub (%a0),%d1
+ tbluw (%a0),%d1
+ tblul (%a0),%d1
+ tblunb (%a0),%d1
+ tblunw (%a0),%d1
+ tblunl (%a0),%d1
+ tblsb (%a0),%d1
+ tblsw (%a0),%d1
+ tblsl (%a0),%d1
+ tblsnb (%a0),%d1
+ tblsnw (%a0),%d1
+ tblsnl (%a0),%d1
--- opcodes/m68k-opc.c.~1.19.~ 2006-08-06 10:33:13.000000000 +0200
+++ opcodes/m68k-opc.c 2006-12-26 14:00:00.000000000 +0100
@@ -2149,8 +2149,8 @@ const struct m68k_opcode m68k_opcodes[]
two(0177770,0107770), "DsD3D1", cpu32 }
#define TBL(name1, name2, name3, s, r) \
TBL1(name1, 4, s, r, 0), TBL1(name2, 4, s, r, 1), TBL1(name3, 4, s, r, 2)
-TBL("tblsb", "tblsw", "tblsl", 2, 1),
-TBL("tblsnb", "tblsnw", "tblsnl", 2, 0),
+TBL("tblsb", "tblsw", "tblsl", 1, 1),
+TBL("tblsnb", "tblsnw", "tblsnl", 1, 0),
TBL("tblub", "tbluw", "tblul", 0, 1),
TBL("tblunb", "tblunw", "tblunl", 0, 0),
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."