Re: [patch] Armv7

[Richard Earnshaw <rearnsha at arm dot com>]

On Thu, 2006-02-23 at 15:25, Paul Brook wrote:
> The attached patch implements Armv7 binutils support. There are three 
> different "profiles" in armv7: v7A, v7R and v7M. The A and R profiles are 
> basically armv6T2 plus a handful of extra instructions.
> The v7M profile removes the traditional Arm state (leaving only Thumb-2), and 
> also removes some of the v5te and v6 instructions.
> 
> I'm not entirely sure what "-march=armv7" should mean. I can think of 2 
> options:
> 
> a) Accept the common subset of the 3 profiles. For Thumb code this is fine. 
> Unfortunately this definition also means all Arm state code is rejected by 
> this switch, which seems less than ideal from a user POV.
> 
> b) Accept the common subset of Thumb instructions, as with (a), plus the 
> common subset of A and R profile Arm state instructions. This is a bit harder 
> to implement.
> 
> c) Accept the superset of all 3 profiles.
> 
> I've currently implemented (a), however I'm wondering if it's worth the effort 
> to implement (b). I don't like (c) because it doesn't make sense for gcc. 
> Having the same option with different semantics in gcc and gas seems a bad 
> idea.
> 
> Any thoughts?
> 
> Tested with cross to arm-none-eabi.
> Ok?
> 
> Paul
> 
> 2006-02-23  Paul Brook  <paul@codesourcery.com>
> 
> gas/
> 	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
> 	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
> 	(struct asm_barrier_opt): Define.
> 	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
> 	(parse_psr): Accept V7M psr names.
> 	(parse_barrier): New function.
> 	(enum operand_parse_code): Add OP_oBARRIER.
> 	(parse_operands): Implement OP_oBARRIER.
> 	(do_barrier): New function.
> 	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
> 	(do_t_cpsi): Add V7M restrictions.
> 	(do_t_mrs, do_t_msr): Validate V7M variants.
> 	(md_assemble): Check for NULL variants.
> 	(v7m_psrs, barrier_opt_names): New tables.
> 	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
> 	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
> 	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
> 	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
> 	(struct cpu_arch_ver_table): Define.
> 	(cpu_arch_ver): New.
> 	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
> 	Tag_CPU_arch_profile.
> 	* doc/c-arm.texi: Document new cpu and arch options.
> gas/testsuite/
> 	* gas/arm/thumb32.d: Fix expected msr and mrs output.
> 	* gas/arm/arch7.d: New test.
> 	* gas/arm/arch7.s: New test.
> 	* gas/arm/arch7m-bad.l: New test.
> 	* gas/arm/arch7m-bad.d: New test.
> 	* gas/arm/arch7m-bad.s: New test.
> include/opcode/
> 	* arm.h: Add V7 feature bits.
> opcodes/
> 	* arm-dis.c (arm_opcodes): Add V7 instructions.
> 	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
> 	(print_arm_address): New function.
> 	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
> 	(psr_name): New function.
> 	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

OK, except that
+/* The 'M' in Arm V7M stands for Microprocessor.
+   On earlier architecture variants it stands for Multiply.  */

It stands for 'Microcontroller', not Microprocessor.

R.