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Re: [discuss] small challenge for instruction selection
- From: "H. J. Lu" <hjl at lucon dot org>
- To: "Siddha, Suresh B" <suresh dot b dot siddha at intel dot com>
- Cc: Andi Kleen <ak at suse dot de>, Zachary Amsden <zach at vmware dot com>,binutils at sources dot redhat dot com, Daniel Jacobowitz <drow at false dot org>,discuss at x86-64 dot org
- Date: Wed, 15 Jun 2005 18:11:08 -0700
- Subject: Re: [discuss] small challenge for instruction selection
- References: <20050614193042.GO11898@wotan.suse.de> <20050614204851.GA23157@nevyn.them.org> <20050614210032.GQ11898@wotan.suse.de> <42AF462C.7010900@vmware.com> <20050614211533.GR11898@wotan.suse.de> <20050615172906.A27658@unix-os.sc.intel.com>
On Wed, Jun 15, 2005 at 05:29:07PM -0700, Siddha, Suresh B wrote:
> On Tue, Jun 14, 2005 at 11:15:33PM +0200, Andi Kleen wrote:
> > > movl $0x80706050,0x40302010(%rdi)
> > > ret $0xb0a0
> > >
> > > Is 3 bytes overhead with 8+2 bytes contiguous.
> >
> > Nice. Thanks Zachary. Any other calls? :)
>
> with 2 bytes overhead.
>
> // mov %eax,0x8070605040302010
> __asm__ __volatile__ ( ".byte 0xa3; .quad 0x8070605040302010");
> __asm__ __volatile__ ( "ret $0xa090");
>
> Assembler is not generating the intended code when I use the mnemonic form
> for the first asm stmt. Disassembly is fine though.
>
I opened a bug:
http://sources.redhat.com/bugzilla/show_bug.cgi?id=1013
H.J.