Hi Nick,
m32r-*-as has a relocate miss at pcrel between different sections
in the same module.
In this case, the relocation field was not 0 with RELA and the addend
was 0.
These are patterns of test and a patch for it.
Please commit it.
Kazuhiro Inaoka
gas/ChangeLog
2004-11-29 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* config/tc-m32r.c (md_pcrel_from_section): Fixed a pcrel
relocte miss between different section in the same module.
(tc_gen_reloc): Ditto.
* testsuite/gas/m32r/rela-1.s: New file.
* testsuite/gas/m32r/rela-1.d: New file.
* testsuite/gas/m32r/m32r.exp: Add new file.
* testsuite/gas/m32r/relax-1.d: Update file.
------------------------------------------------------------------------
Index: config/tc-m32r.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m32r.c,v
retrieving revision 1.37
diff -u -r1.37 tc-m32r.c
--- config/tc-m32r.c 25 Jun 2004 16:11:09 -0000 1.37
+++ config/tc-m32r.c 29 Nov 2004 07:57:17 -0000
@@ -1999,6 +1999,12 @@
|| S_IS_EXTERNAL (fixP->fx_addsy)
|| S_IS_WEAK (fixP->fx_addsy)))
{
+ if (S_GET_SEGMENT(fixP->fx_addsy) != sec
+ && S_IS_DEFINED (fixP->fx_addsy)
+ && ! S_IS_EXTERNAL(fixP->fx_addsy)
+ && ! S_IS_WEAK(fixP->fx_addsy))
+ return fixP->fx_offset;
+
/* The symbol is undefined (or is defined but not in this section).
Let the linker figure it out. */
return 0;
@@ -2488,7 +2494,7 @@
&& ! S_IS_EXTERNAL(fixP->fx_addsy)
&& ! S_IS_WEAK(fixP->fx_addsy))
/* Already used fx_offset in the opcode field itseld. */
- reloc->addend = 0;
+ reloc->addend = fixP->fx_offset;
else
reloc->addend = fixP->fx_addnumber;
------------------------------------------------------------------------
diff -N ./m32r.exp new/m32r.exp
9a10
run_dump_test "rela-1"
diff -N ./rela-1.d new/rela-1.d
0a1,24
#as:
#objdump: -dr
#name: rela-1
.*: +file format .*
Disassembly of section .text:
0+0000 <.text>:
0: fe 00 00 00 bl 0 <.text>
0: R_M32R_26_PCREL_RELA .text2\+0x8
4: fe 00 00 00 bl 4 <.text\+0x4>
4: R_M32R_26_PCREL_RELA .text2\+0x8
8: 7e 00 f0 00 bl 8 <.text\+0x8> \|\| nop
8: R_M32R_10_PCREL_RELA .text2\+0x8
c: b0 90 00 00 bnez r0,c <.text\+0xc>
c: R_M32R_18_PCREL_RELA .text2\+0x8
10: 10 80 7e 00 mv r0,r0 -> bl 10 <.text\+0x10>
12: R_M32R_10_PCREL_RELA .text2\+0x8
Disassembly of section .text2:
0+0000 <label-0x8>:
0: 70 00 70 00 nop -> nop
4: 70 00 70 00 nop -> nop
diff -N ./rela-1.s new/rela-1.s
0a1,18
.section .text
bl label
bl.l label
bl.s label
bnez r0,label
mv r0,r0
bl.s label
.section .text2, "ax"
nop
nop
nop
nop
label:
.end
diff -N ./relax-1.d new/relax-1.d
17,18c17,18
< *0: ff 00 00 01 bra 4 <Work>
< [ ]*0: R_M32R_26_PCREL_RELA .text
---
*0: ff 00 00 00 bra 0 <branch>
[ ]*0: R_M32R_26_PCREL_RELA .text\+0x4