PATCH: Undo the elfNN_ia64_relax_brl change

["H. J. Lu" <hjl at lucon dot org>]

On Thu, May 12, 2005 at 02:36:33PM -0700, Richard Henderson wrote:
> On Thu, May 12, 2005 at 01:05:22PM -0700, H. J. Lu wrote:
> > > I really wish you'd extract the three insns independently, rather
> > > than extracting 3 words and using quite so many arbitrary masks.
> > > It's not like we don't have a 64-bit type available.
> > > 
> > 
> > I was thinking to use long long since long may be 32bit. But I am not
> > sure if all compilers support it. I guess I can use
> > 
> > #if BFD_HOST_LONG_LONG
> > long long ..
> > #else
> >   return FALSE;
> > #endif
> 
> We already assume a 64-bit type, for instance in elfNN_ia64_install_value.
> I see that elf32-ia64.lo is in BFD32_BACKENDS; that's probably a mistake.
> 
> I see no reason to complicate things by doing anything other than assuming
> a 64-bit type is available when compiling for ia64.  Every reasonable
> compiler does support such a type.
> 
> 
> 

Given this, should we revert this change

http://sourceware.org/ml/binutils/2005-02/msg00348.html


H.J.
----
2005-05-12  H.J. Lu  <hongjiu.lu@intel.com>

	* elfxx-ia64.c (elfNN_ia64_relax_brl): Undo the change made on
	2005-02-16.

--- bfd/elfxx-ia64.c.ll	2005-05-12 17:50:36.000000000 -0700
+++ bfd/elfxx-ia64.c	2005-05-12 18:01:54.000000000 -0700
@@ -786,39 +786,33 @@ elfNN_ia64_relax_br (bfd_byte *contents,
 static void
 elfNN_ia64_relax_brl (bfd_byte *contents, bfd_vma off)
 {
-  unsigned int template, t0, t1, t2, t3;
+  int template;
   bfd_byte *hit_addr;
+  bfd_vma t0, t1, i0, i1, i2;
 
   hit_addr = (bfd_byte *) (contents + off);
   hit_addr -= (long) hit_addr & 0x3;
-  t0 = bfd_getl32 (hit_addr + 0);
-  t1 = bfd_getl32 (hit_addr + 4);
-  t2 = bfd_getl32 (hit_addr + 8);
-  t3 = bfd_getl32 (hit_addr + 12);
-
-  /* Turn a MLX bundle into a MBB bundle with the same stop-bit
-     variety.  */
-  template = 0x12;
-  if ((t0 & 0x1f) == 5)
-    template += 1;
+  t0 = bfd_getl64 (hit_addr);
+  t1 = bfd_getl64 (hit_addr + 8);
 
   /* Keep the instruction in slot 0. */
-  t0 &= 0xffffffe0;
-  t1 &= 0x3fff;
-
-  t0 |= template;
-
+  i0 = (t0 >> 5) & 0x1ffffffffffLL;
+  /* Use nop.b for slot 1. */
+  i1 = 0x4000000000LL;
   /* For slot 2, turn brl into br by masking out bit 40.  */
-  t2 &= 0xff800000;
-  t3 &= 0x7fffffff;
+  i2 = (t1 >> 23) & 0x0ffffffffffLL;
 
-  /* Use nop.b for slot 1. */
-  t2 |= 0x100000;
+  /* Turn a MLX bundle into a MBB bundle with the same stop-bit
+     variety.  */
+  if (t0 & 0x1)
+    template = 0x13;
+  else
+    template = 0x12;
+  t0 = (i1 << 46) | (i0 << 5) | template;
+  t1 = (i2 << 23) | (i1 >> 18);
 
-  bfd_putl32 (t0, hit_addr);
-  bfd_putl32 (t1, hit_addr + 4);
-  bfd_putl32 (t2, hit_addr + 8);
-  bfd_putl32 (t3, hit_addr + 12);
+  bfd_putl64 (t0, hit_addr);
+  bfd_putl64 (t1, hit_addr + 8);
 }
 
 /* These functions do relaxation for IA-64 ELF.  */