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patch: e500 with double fp support
- From: Aldy Hernandez <aldyh at redhat dot com>
- To: binutils at sources dot redhat dot com
- Date: Wed, 6 Oct 2004 19:57:26 -0400
- Subject: patch: e500 with double fp support
Hi folks.
As per FreeScale's announcement, here is a patch adding double precision
support to the E500 core.
I thought about adding a new option, but decided against it for
simplicity's sake. After all, the opcodes don't conflict with anything
else in the E500.
Committed to mainline and 2.15 branch.
Tested on powerpc-eabispe.
Cheers.
Aldy
* opcodes/ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
* gas/testsuite/gas/ppc/e500.s: Add double-precision instructions.
* gas/testsuite/gas/ppc/e500.d: Same.
Index: opcodes/ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.74
diff -c -p -r1.74 ppc-opc.c
*** opcodes/ppc-opc.c 9 Sep 2004 12:42:35 -0000 1.74
--- opcodes/ppc-opc.c 6 Oct 2004 23:54:53 -0000
*************** const struct powerpc_opcode powerpc_opco
*** 1958,1963 ****
--- 1958,1998 ----
{ "nmaclhwso.", XO(4,494,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
{ "mfvscr", VX(4, 1540), VX_MASK, PPCVEC, { VD } },
{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VB } },
+
+ /* Double-precision opcodes. */
+ /* Some of these conflict with AltiVec, so move them before, since
+ PPCVEC includes the PPC_OPCODE_PPC set. */
+ { "efscfd", VX(4, 719), VX_MASK, PPCEFS, { RS, RA } },
+ { "efdabs", VX(4, 740), VX_MASK, PPCEFS, { RS, RA } },
+ { "efdnabs", VX(4, 741), VX_MASK, PPCEFS, { RS, RA } },
+ { "efdneg", VX(4, 742), VX_MASK, PPCEFS, { RS, RA } },
+ { "efdadd", VX(4, 736), VX_MASK, PPCEFS, { RS, RA, RB } },
+ { "efdsub", VX(4, 737), VX_MASK, PPCEFS, { RS, RA, RB } },
+ { "efdmul", VX(4, 744), VX_MASK, PPCEFS, { RS, RA, RB } },
+ { "efddiv", VX(4, 745), VX_MASK, PPCEFS, { RS, RA, RB } },
+ { "efdcmpgt", VX(4, 748), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdcmplt", VX(4, 749), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdcmpeq", VX(4, 750), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdtstgt", VX(4, 764), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdtstlt", VX(4, 765), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdtsteq", VX(4, 766), VX_MASK, PPCEFS, { CRFD, RA, RB } },
+ { "efdcfsi", VX(4, 753), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfsid", VX(4, 739), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfui", VX(4, 752), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfuid", VX(4, 738), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfsf", VX(4, 755), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfuf", VX(4, 754), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctsi", VX(4, 757), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctsidz",VX(4, 747), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctsiz", VX(4, 762), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctui", VX(4, 756), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctuidz",VX(4, 746), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctuiz", VX(4, 760), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctsf", VX(4, 759), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdctuf", VX(4, 758), VX_MASK, PPCEFS, { RS, RB } },
+ { "efdcfs", VX(4, 751), VX_MASK, PPCEFS, { RS, RB } },
+ /* End of double-precision opcodes. */
+
{ "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } },
Index: gas/testsuite/gas/ppc/e500.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/e500.s,v
retrieving revision 1.1
diff -c -p -r1.1 e500.s
*** gas/testsuite/gas/ppc/e500.s 19 Aug 2002 21:01:02 -0000 1.1
--- gas/testsuite/gas/ppc/e500.s 6 Oct 2004 23:54:53 -0000
*************** start:
*** 13,15 ****
--- 13,47 ----
bbelr
mtspefscr 8
mfspefscr 9
+
+ # Double-precision opcodes.
+ efscfd 5,4
+ efdabs 5,4
+ efdnabs 5,4
+ efdneg 5,4
+ efdadd 5,4,3
+ efdsub 5,4,3
+ efdmul 5,4,3
+ efddiv 5,4,3
+ efdcmpgt 5,4,3
+ efdcmplt 5,4,3
+ efdcmpeq 5,4,3
+ efdtstgt 5,4,3
+ efdtstgt 5,4,3
+ efdtstlt 5,4,3
+ efdtsteq 5,4,3
+ efdcfsi 5,4
+ efdcfsid 5,4
+ efdcfui 5,4
+ efdcfuid 5,4
+ efdcfsf 5,4
+ efdcfuf 5,4
+ efdctsi 5,4
+ efdctsidz 5,4
+ efdctsiz 5,4
+ efdctui 5,4
+ efdctuidz 5,4
+ efdctuiz 5,4
+ efdctsf 5,4
+ efdctuf 5,4
+ efdcfs 5,4
Index: gas/testsuite/gas/ppc/e500.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/e500.d,v
retrieving revision 1.4
diff -c -p -r1.4 e500.d
*** gas/testsuite/gas/ppc/e500.d 16 Mar 2004 00:58:42 -0000 1.4
--- gas/testsuite/gas/ppc/e500.d 6 Oct 2004 23:54:53 -0000
*************** Disassembly of section \.text:
*** 19,21 ****
--- 19,51 ----
24: 7c 00 04 4c bbelr
28: 7d 00 83 a6 mtspefscr r8
2c: 7d 20 82 a6 mfspefscr r9
+ 30: 10 a4 02 cf efscfd r5,r4
+ 34: 10 a4 02 e4 efdabs r5,r4
+ 38: 10 a4 02 e5 efdnabs r5,r4
+ 3c: 10 a4 02 e6 efdneg r5,r4
+ 40: 10 a4 1a e0 efdadd r5,r4,r3
+ 44: 10 a4 1a e1 efdsub r5,r4,r3
+ 48: 10 a4 1a e8 efdmul r5,r4,r3
+ 4c: 10 a4 1a e9 efddiv r5,r4,r3
+ 50: 12 84 1a ec efdcmpgt cr5,r4,r3
+ 54: 12 84 1a ed efdcmplt cr5,r4,r3
+ 58: 12 84 1a ee efdcmpeq cr5,r4,r3
+ 5c: 12 84 1a fc efdtstgt cr5,r4,r3
+ 60: 12 84 1a fc efdtstgt cr5,r4,r3
+ 64: 12 84 1a fd efdtstlt cr5,r4,r3
+ 68: 12 84 1a fe efdtsteq cr5,r4,r3
+ 6c: 10 a0 22 f1 efdcfsi r5,r4
+ 70: 10 a0 22 e3 efdcfsid r5,r4
+ 74: 10 a0 22 f0 efdcfui r5,r4
+ 78: 10 a0 22 e2 efdcfuid r5,r4
+ 7c: 10 a0 22 f3 efdcfsf r5,r4
+ 80: 10 a0 22 f2 efdcfuf r5,r4
+ 84: 10 a0 22 f5 efdctsi r5,r4
+ 88: 10 a0 22 eb efdctsidz r5,r4
+ 8c: 10 a0 22 fa efdctsiz r5,r4
+ 90: 10 a0 22 f4 efdctui r5,r4
+ 94: 10 a0 22 ea efdctuidz r5,r4
+ 98: 10 a0 22 f8 efdctuiz r5,r4
+ 9c: 10 a0 22 f7 efdctsf r5,r4
+ a0: 10 a0 22 f6 efdctuf r5,r4
+ a4: 10 a0 22 ef efdcfs r5,r4