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[patch][rfa] Add fr550 support to gas/bfd/binutils for frv
- From: Dave Brolley <brolley at redhat dot com>
- To: binutils at sources dot redhat dot com
- Date: Mon, 06 Oct 2003 17:15:38 -0400
- Subject: [patch][rfa] Add fr550 support to gas/bfd/binutils for frv
- Organization: Red Hat Canada, Ltd
The attached patch adds fr550 support to bfd, gas and binutils for the
frv architecture.
OK to commit?
Dave
2003-10-06 Dave Brolley <brolley@redhat.com>
On behalf of Michael Snyder <msnyder@redhat.com>
* archures.c: Add FRV fr550 machine.
* cpu-frv.c: Ditto.
* elf32-frv.c: Ditto.
* bfd-in2.h: Regenerate.
2003-10-06 Dave Brolley <brolley@redhat.com>
* binutils-all/objdump.exp (cpu_expected): Add fr550.
2003-10-06 Dave Brolley <brolley@redhat.com>
* config/tc-frv.c (fr550_check_insn_acc_range): New function.
(fr550_check_acc_range): New function.
(md_assemble): Call fr550_check_acc_range.
2003-10-06 Dave Brolley <brolley@redhat.com>
* config/tc-frv.c: Handle DEFAULT_CPU_FR550.
(md_parse_option): Handle OPTION_CPU==fr550.
(md_show_usage): Document fr550.
2003-10-06 Dave Brolley <brolley@redhat.com>
* frv.h (EF_FRV_CPU_FR550): New macro.
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.83
diff -c -p -r1.83 archures.c
*** bfd/archures.c 30 Sep 2003 16:17:11 -0000 1.83
--- bfd/archures.c 6 Oct 2003 20:12:37 -0000
*************** DESCRIPTION
*** 281,286 ****
--- 281,287 ----
.#define bfd_mach_fr400 400
.#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
.#define bfd_mach_fr500 500
+ .#define bfd_mach_fr550 550
. bfd_arch_mcore,
. bfd_arch_ia64, {* HP/Intel ia64 *}
.#define bfd_mach_ia64_elf64 64
Index: bfd/bfd-in2.h
===================================================================
RCS file: /cvs/src/src/bfd/bfd-in2.h,v
retrieving revision 1.237
diff -c -p -r1.237 bfd-in2.h
*** bfd/bfd-in2.h 30 Sep 2003 16:17:11 -0000 1.237
--- bfd/bfd-in2.h 6 Oct 2003 20:12:37 -0000
*************** enum bfd_architecture
*** 1710,1715 ****
--- 1710,1716 ----
#define bfd_mach_fr400 400
#define bfd_mach_frvtomcat 499 /* fr500 prototype */
#define bfd_mach_fr500 500
+ #define bfd_mach_fr550 550
bfd_arch_mcore,
bfd_arch_ia64, /* HP/Intel ia64 */
#define bfd_mach_ia64_elf64 64
Index: bfd/cpu-frv.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-frv.c,v
retrieving revision 1.3
diff -c -p -r1.3 cpu-frv.c
*** bfd/cpu-frv.c 26 Aug 2003 17:13:18 -0000 1.3
--- bfd/cpu-frv.c 6 Oct 2003 20:12:38 -0000
*************** static const bfd_arch_info_type arch_inf
*** 46,53 ****
static const bfd_arch_info_type arch_info_500
= FRV_ARCH (bfd_mach_fr500, "fr500", FALSE, &arch_info_400);
static const bfd_arch_info_type arch_info_simple
! = FRV_ARCH (bfd_mach_frvsimple, "simple", FALSE, &arch_info_500);
static const bfd_arch_info_type arch_info_tomcat
= FRV_ARCH (bfd_mach_frvtomcat, "tomcat", FALSE, &arch_info_simple);
--- 46,56 ----
static const bfd_arch_info_type arch_info_500
= FRV_ARCH (bfd_mach_fr500, "fr500", FALSE, &arch_info_400);
+ static const bfd_arch_info_type arch_info_550
+ = FRV_ARCH (bfd_mach_fr550, "fr550", FALSE, &arch_info_500);
+
static const bfd_arch_info_type arch_info_simple
! = FRV_ARCH (bfd_mach_frvsimple, "simple", FALSE, &arch_info_550);
static const bfd_arch_info_type arch_info_tomcat
= FRV_ARCH (bfd_mach_frvtomcat, "tomcat", FALSE, &arch_info_simple);
Index: bfd/elf32-frv.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-frv.c,v
retrieving revision 1.7
diff -c -p -r1.7 elf32-frv.c
*** bfd/elf32-frv.c 27 Aug 2003 09:21:15 -0000 1.7
--- bfd/elf32-frv.c 6 Oct 2003 20:12:38 -0000
*************** elf32_frv_machine (abfd)
*** 997,1002 ****
--- 997,1003 ----
switch (elf_elfheader (abfd)->e_flags & EF_FRV_CPU_MASK)
{
default: break;
+ case EF_FRV_CPU_FR550: return bfd_mach_fr550;
case EF_FRV_CPU_FR500: return bfd_mach_fr500;
case EF_FRV_CPU_FR400: return bfd_mach_fr400;
case EF_FRV_CPU_FR300: return bfd_mach_fr300;
*************** frv_elf_merge_private_bfd_data (ibfd, ob
*** 1245,1250 ****
--- 1246,1252 ----
default: strcat (new_opt, " -mcpu=?"); break;
case EF_FRV_CPU_GENERIC: strcat (new_opt, " -mcpu=frv"); break;
case EF_FRV_CPU_SIMPLE: strcat (new_opt, " -mcpu=simple"); break;
+ case EF_FRV_CPU_FR550: strcat (new_opt, " -mcpu=fr550"); break;
case EF_FRV_CPU_FR500: strcat (new_opt, " -mcpu=fr500"); break;
case EF_FRV_CPU_FR400: strcat (new_opt, " -mcpu=fr400"); break;
case EF_FRV_CPU_FR300: strcat (new_opt, " -mcpu=fr300"); break;
*************** frv_elf_merge_private_bfd_data (ibfd, ob
*** 1256,1261 ****
--- 1258,1264 ----
default: strcat (old_opt, " -mcpu=?"); break;
case EF_FRV_CPU_GENERIC: strcat (old_opt, " -mcpu=frv"); break;
case EF_FRV_CPU_SIMPLE: strcat (old_opt, " -mcpu=simple"); break;
+ case EF_FRV_CPU_FR550: strcat (old_opt, " -mcpu=fr550"); break;
case EF_FRV_CPU_FR500: strcat (old_opt, " -mcpu=fr500"); break;
case EF_FRV_CPU_FR400: strcat (old_opt, " -mcpu=fr400"); break;
case EF_FRV_CPU_FR300: strcat (old_opt, " -mcpu=fr300"); break;
*************** frv_elf_print_private_bfd_data (abfd, pt
*** 1322,1327 ****
--- 1325,1331 ----
{
default: break;
case EF_FRV_CPU_SIMPLE: fprintf (file, " -mcpu=simple"); break;
+ case EF_FRV_CPU_FR550: fprintf (file, " -mcpu=fr550"); break;
case EF_FRV_CPU_FR500: fprintf (file, " -mcpu=fr500"); break;
case EF_FRV_CPU_FR400: fprintf (file, " -mcpu=fr400"); break;
case EF_FRV_CPU_FR300: fprintf (file, " -mcpu=fr300"); break;
Index: binutils/testsuite/binutils-all/objdump.exp
===================================================================
RCS file: /cvs/src/src/binutils/testsuite/binutils-all/objdump.exp,v
retrieving revision 1.14
diff -c -p -r1.14 objdump.exp
*** binutils/testsuite/binutils-all/objdump.exp 18 Nov 2002 08:28:38 -0000 1.14
--- binutils/testsuite/binutils-all/objdump.exp 6 Oct 2003 20:12:38 -0000
*************** set got [binutils_run $OBJDUMP "$OBJDUMP
*** 36,42 ****
set cpus_expected [list]
lappend cpus_expected a29k alliant alpha arc arm convex
! lappend cpus_expected d10v d30v fr30 fr500 h8 hppa i386 i860 i960 ip2022
lappend cpus_expected m32r m68hc11 m68hc12 m68k m88k MCore
lappend cpus_expected mips mn10200 mn10300 ns32k pj powerpc pyramid
lappend cpus_expected romp rs6000 s390 sh sparc
--- 36,42 ----
set cpus_expected [list]
lappend cpus_expected a29k alliant alpha arc arm convex
! lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 i860 i960 ip2022
lappend cpus_expected m32r m68hc11 m68hc12 m68k m88k MCore
lappend cpus_expected mips mn10200 mn10300 ns32k pj powerpc pyramid
lappend cpus_expected romp rs6000 s390 sh sparc
Index: gas/config/tc-frv.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-frv.c,v
retrieving revision 1.8
diff -c -p -r1.8 tc-frv.c
*** gas/config/tc-frv.c 5 Sep 2003 07:18:26 -0000 1.8
--- gas/config/tc-frv.c 6 Oct 2003 20:12:39 -0000
*************** static FRV_VLIW vliw;
*** 148,153 ****
--- 148,158 ----
#define DEFAULT_FLAGS EF_FRV_CPU_FR400
#else
+ #ifdef DEFAULT_CPU_FR550
+ #define DEFAULT_MACHINE bfd_mach_fr550
+ #define DEFAULT_FLAGS EF_FRV_CPU_FR550
+
+ #else
#define DEFAULT_MACHINE bfd_mach_fr500
#define DEFAULT_FLAGS EF_FRV_CPU_FR500
#endif
*************** static FRV_VLIW vliw;
*** 155,160 ****
--- 160,166 ----
#endif
#endif
#endif
+ #endif
static unsigned long frv_mach = bfd_mach_frv;
*************** md_parse_option (c, arg)
*** 340,345 ****
--- 346,357 ----
frv_mach = bfd_mach_fr500;
}
+ else if (strcmp (p, "fr550") == 0)
+ {
+ cpu_flags = EF_FRV_CPU_FR550;
+ frv_mach = bfd_mach_fr550;
+ }
+
else if (strcmp (p, "fr400") == 0)
{
cpu_flags = EF_FRV_CPU_FR400;
*************** md_show_usage (stream)
*** 427,433 ****
fprintf (stream, _("-mpic Note small position independent code\n"));
fprintf (stream, _("-mPIC Note large position independent code\n"));
fprintf (stream, _("-mlibrary-pic Compile library for large position indepedent code\n"));
! fprintf (stream, _("-mcpu={fr500|fr400|fr300|frv|simple|tomcat}\n"));
fprintf (stream, _(" Record the cpu type\n"));
fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n"));
fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n"));
--- 439,445 ----
fprintf (stream, _("-mpic Note small position independent code\n"));
fprintf (stream, _("-mPIC Note large position independent code\n"));
fprintf (stream, _("-mlibrary-pic Compile library for large position indepedent code\n"));
! fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr300|frv|simple|tomcat}\n"));
fprintf (stream, _(" Record the cpu type\n"));
fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n"));
fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n"));
*************** frv_tomcat_workaround ()
*** 936,941 ****
--- 948,1040 ----
}
}
+ static int
+ fr550_check_insn_acc_range (frv_insn *insn, int low, int hi)
+ {
+ int acc;
+ switch (CGEN_INSN_NUM (insn->insn))
+ {
+ case FRV_INSN_MADDACCS:
+ case FRV_INSN_MSUBACCS:
+ case FRV_INSN_MDADDACCS:
+ case FRV_INSN_MDSUBACCS:
+ case FRV_INSN_MASACCS:
+ case FRV_INSN_MDASACCS:
+ acc = insn->fields.f_ACC40Si;
+ if (acc < low || acc > hi)
+ return 1; /* out of range */
+ acc = insn->fields.f_ACC40Sk;
+ if (acc < low || acc > hi)
+ return 1; /* out of range */
+ break;
+ case FRV_INSN_MMULHS:
+ case FRV_INSN_MMULHU:
+ case FRV_INSN_MMULXHS:
+ case FRV_INSN_MMULXHU:
+ case FRV_INSN_CMMULHS:
+ case FRV_INSN_CMMULHU:
+ case FRV_INSN_MQMULHS:
+ case FRV_INSN_MQMULHU:
+ case FRV_INSN_MQMULXHS:
+ case FRV_INSN_MQMULXHU:
+ case FRV_INSN_CMQMULHS:
+ case FRV_INSN_CMQMULHU:
+ case FRV_INSN_MMACHS:
+ case FRV_INSN_MMRDHS:
+ case FRV_INSN_CMMACHS:
+ case FRV_INSN_MQMACHS:
+ case FRV_INSN_CMQMACHS:
+ case FRV_INSN_MQXMACHS:
+ case FRV_INSN_MQXMACXHS:
+ case FRV_INSN_MQMACXHS:
+ case FRV_INSN_MCPXRS:
+ case FRV_INSN_MCPXIS:
+ case FRV_INSN_CMCPXRS:
+ case FRV_INSN_CMCPXIS:
+ case FRV_INSN_MQCPXRS:
+ case FRV_INSN_MQCPXIS:
+ acc = insn->fields.f_ACC40Sk;
+ if (acc < low || acc > hi)
+ return 1; /* out of range */
+ break;
+ case FRV_INSN_MMACHU:
+ case FRV_INSN_MMRDHU:
+ case FRV_INSN_CMMACHU:
+ case FRV_INSN_MQMACHU:
+ case FRV_INSN_CMQMACHU:
+ case FRV_INSN_MCPXRU:
+ case FRV_INSN_MCPXIU:
+ case FRV_INSN_CMCPXRU:
+ case FRV_INSN_CMCPXIU:
+ case FRV_INSN_MQCPXRU:
+ case FRV_INSN_MQCPXIU:
+ acc = insn->fields.f_ACC40Uk;
+ if (acc < low || acc > hi)
+ return 1; /* out of range */
+ break;
+ default:
+ break;
+ }
+ return 0; /* all is ok */
+ }
+
+ static int
+ fr550_check_acc_range (FRV_VLIW *vliw, frv_insn *insn)
+ {
+ switch ((*vliw->current_vliw)[vliw->next_slot - 1])
+ {
+ case UNIT_FM0:
+ case UNIT_FM2:
+ return fr550_check_insn_acc_range (insn, 0, 3);
+ case UNIT_FM1:
+ case UNIT_FM3:
+ return fr550_check_insn_acc_range (insn, 4, 7);
+ default:
+ break;
+ }
+ return 0; /* all is ok */
+ }
+
void
md_assemble (str)
char * str;
*************** md_assemble (str)
*** 1018,1023 ****
--- 1117,1124 ----
else if (frv_mach != bfd_mach_frv)
{
packing_constraint = frv_vliw_add_insn (& vliw, insn.insn);
+ if (frv_mach == bfd_mach_fr550 && ! packing_constraint)
+ packing_constraint = fr550_check_acc_range (& vliw, & insn);
if (insn.fields.f_pack)
frv_vliw_reset (& vliw, frv_mach, frv_flags);
if (packing_constraint)
Index: include/elf/frv.h
===================================================================
RCS file: /cvs/src/src/include/elf/frv.h,v
retrieving revision 1.1
diff -c -p -r1.1 frv.h
*** include/elf/frv.h 18 Jun 2002 21:15:57 -0000 1.1
--- include/elf/frv.h 6 Oct 2003 20:12:42 -0000
*************** END_RELOC_NUMBERS(R_FRV_max)
*** 75,80 ****
--- 75,81 ----
#define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */
#define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */
#define EF_FRV_CPU_FR400 0x05000000 /* FRV400 */
+ #define EF_FRV_CPU_FR550 0x06000000 /* FRV550 */
/* Mask of PIC related bits */
#define EF_FRV_PIC_FLAGS (EF_FRV_PIC | EF_FRV_LIBPIC | EF_FRV_BIGPIC)