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Is MIPS branch delay insn identification ever used?
- From: "J. Grant" <jg-lists at jguk dot org>
- To: binutils <binutils at sources dot redhat dot com>
- Date: Mon, 31 Mar 2003 17:44:36 +0100
- Subject: Is MIPS branch delay insn identification ever used?
Hello,
In mips-dis.c near the end of print_insn_mips(); there are several lines
related to branching and the instruction type.
if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor))
continue;
/* Figure out instruction type and branch delay information. */
if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0)
{
if ((info->insn_type & INSN_WRITE_GPR_31) != 0)
info->insn_type = dis_jsr;
else
info->insn_type = dis_branch;
info->branch_delay_insns = 1;
}
etc...
The SKIP_ZEROES code in objdump.c checks that it is not a branch delay
insn. However, other than that, this information seems to be unused.
There is not an arg to enable any use of this I believe. gdb and gas do
not seem to use this info either.
Is the plan to support some disassembler instruction re-ordering around
branch instructions?
I have branch and branch likely, delay slot re-ordering implemented in
my C-- output mode for objdump.
Please include my email address in replies.
Regards
JG