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[applied mips patch] minor m32r2 cleanups.
- From: cgd at broadcom dot com
- To: binutils at sources dot redhat dot com
- Date: 02 Jan 2003 12:03:01 -0800
- Subject: [applied mips patch] minor m32r2 cleanups.
While doing the other stuff, I noticed a few bogons in my
recently-added m32r2 stuff.
The biggies: Fixed a lot of comments to be a bit more true to the
m32r2 spec. Fixed indentation lossage.
tested w/ my normal set of targets, on the gas/ld/binutils tests.
cgd
==
[ gas/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.186
diff -u -p -r1.186 tc-mips.c
--- gas/config/tc-mips.c 31 Dec 2002 08:11:17 -0000 1.186
+++ gas/config/tc-mips.c 2 Jan 2003 19:53:29 -0000
@@ -1,5 +1,5 @@
/* tc-mips.c -- assemble code for a MIPS chip.
- Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by the OSF and Ralph Campbell.
Written by Keith Knowles and Ralph Campbell, working independently.
@@ -8118,6 +8118,7 @@ mips_ip (str, ip)
unsigned int regno;
unsigned int lastregno = 0;
unsigned int lastpos = 0;
+ unsigned int limlo, limhi;
char *s_reset;
char save_c = 0;
@@ -8286,58 +8287,76 @@ mips_ip (str, ip)
case '+': /* Opcode extension character. */
switch (*++args)
{
- case 'A': /* ins/ext "pos". */
- my_getExpression (&imm_expr, s);
- check_absolute_expr (ip, &imm_expr);
- if ((unsigned long) imm_expr.X_add_number > 31)
- {
- as_bad (_("Improper position (%lu)"),
- (unsigned long) imm_expr.X_add_number);
- imm_expr.X_add_number = 0;
- }
- lastpos = imm_expr.X_add_number;
- ip->insn_opcode |= lastpos << OP_SH_SHAMT;
- imm_expr.X_op = O_absent;
- s = expr_end;
- continue;
-
- case 'B': /* "ins" size spec (becomes MSB). */
- my_getExpression (&imm_expr, s);
- check_absolute_expr (ip, &imm_expr);
- if (imm_expr.X_add_number == 0
- || (unsigned long) imm_expr.X_add_number > 32
- || ((unsigned long) imm_expr.X_add_number
- + lastpos) > 32)
- {
- as_bad (_("Improper insert size (%lu, position %lu)"),
- (unsigned long) imm_expr.X_add_number,
- (unsigned long) lastpos);
- imm_expr.X_add_number &= OP_MASK_INSMSB;
- }
- ip->insn_opcode |= (lastpos + imm_expr.X_add_number
- - 1) << OP_SH_INSMSB;
- imm_expr.X_op = O_absent;
- s = expr_end;
- continue;
-
- case 'C': /* "ext" size spec (becomes MSBD). */
- my_getExpression (&imm_expr, s);
- check_absolute_expr (ip, &imm_expr);
- if (imm_expr.X_add_number == 0
- || (unsigned long) imm_expr.X_add_number > 32
- || ((unsigned long) imm_expr.X_add_number
- + lastpos) > 32)
- {
- as_bad (_("Improper extract size (%lu, position %lu)"),
- (unsigned long) imm_expr.X_add_number,
- (unsigned long) lastpos);
- imm_expr.X_add_number &= OP_MASK_EXTMSBD;
- }
- ip->insn_opcode |= (imm_expr.X_add_number
- - 1) << OP_SH_EXTMSBD;
- imm_expr.X_op = O_absent;
- s = expr_end;
- continue;
+ case 'A': /* ins/ext position, becomes LSB. */
+ limlo = 0;
+ limhi = 31;
+ my_getExpression (&imm_expr, s);
+ check_absolute_expr (ip, &imm_expr);
+ if ((unsigned long) imm_expr.X_add_number < limlo
+ || (unsigned long) imm_expr.X_add_number > limhi)
+ {
+ as_bad (_("Improper position (%lu)"),
+ (unsigned long) imm_expr.X_add_number);
+ imm_expr.X_add_number = limlo;
+ }
+ lastpos = imm_expr.X_add_number;
+ ip->insn_opcode |= (imm_expr.X_add_number
+ & OP_MASK_SHAMT) << OP_SH_SHAMT;
+ imm_expr.X_op = O_absent;
+ s = expr_end;
+ continue;
+
+ case 'B': /* ins size, becomes MSB. */
+ limlo = 1;
+ limhi = 32;
+ my_getExpression (&imm_expr, s);
+ check_absolute_expr (ip, &imm_expr);
+ /* Check for negative input so that small negative numbers
+ will not succeed incorrectly. The checks against
+ (pos+size) transitively check "size" itself,
+ assuming that "pos" is reasonable. */
+ if ((long) imm_expr.X_add_number < 0
+ || ((unsigned long) imm_expr.X_add_number
+ + lastpos) < limlo
+ || ((unsigned long) imm_expr.X_add_number
+ + lastpos) > limhi)
+ {
+ as_bad (_("Improper insert size (%lu, position %lu)"),
+ (unsigned long) imm_expr.X_add_number,
+ (unsigned long) lastpos);
+ imm_expr.X_add_number = limlo - lastpos;
+ }
+ ip->insn_opcode |= ((lastpos + imm_expr.X_add_number - 1)
+ & OP_MASK_INSMSB) << OP_SH_INSMSB;
+ imm_expr.X_op = O_absent;
+ s = expr_end;
+ continue;
+
+ case 'C': /* ext size, becomes MSBD. */
+ limlo = 1;
+ limhi = 32;
+ my_getExpression (&imm_expr, s);
+ check_absolute_expr (ip, &imm_expr);
+ /* Check for negative input so that small negative numbers
+ will not succeed incorrectly. The checks against
+ (pos+size) transitively check "size" itself,
+ assuming that "pos" is reasonable. */
+ if ((long) imm_expr.X_add_number < 0
+ || ((unsigned long) imm_expr.X_add_number
+ + lastpos) < limlo
+ || ((unsigned long) imm_expr.X_add_number
+ + lastpos) > limhi)
+ {
+ as_bad (_("Improper extract size (%lu, position %lu)"),
+ (unsigned long) imm_expr.X_add_number,
+ (unsigned long) lastpos);
+ imm_expr.X_add_number = limlo - lastpos;
+ }
+ ip->insn_opcode |= ((imm_expr.X_add_number - 1)
+ & OP_MASK_EXTMSBD) << OP_SH_EXTMSBD;
+ imm_expr.X_op = O_absent;
+ s = expr_end;
+ continue;
case 'D':
/* +D is for disassembly only; never match. */
Index: gas/doc/c-mips.texi
===================================================================
RCS file: /cvs/src/src/gas/doc/c-mips.texi,v
retrieving revision 1.25
diff -u -p -r1.25 c-mips.texi
--- gas/doc/c-mips.texi 31 Dec 2002 07:29:27 -0000 1.25
+++ gas/doc/c-mips.texi 2 Jan 2003 19:53:30 -0000
@@ -288,8 +288,8 @@ assembly language programmers!
@kindex @code{.set mips@var{n}}
@sc{gnu} @code{@value{AS}} supports an additional directive to change
the @sc{mips} Instruction Set Architecture level on the fly: @code{.set
-mips@var{n}}. @var{n} should be a number from 0 to 5, or 32 or 64.
-The values 1 to 5, 32, and 64 make the assembler accept instructions
+mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, or 64.
+The values other than 0 make the assembler accept instructions
for the corresponding @sc{isa} level, from that point on in the
assembly. @code{.set mips@var{n}} affects not only which instructions
are permitted, but also how certain macros are expanded. @code{.set
Index: gas/testsuite/gas/mips/mips32r2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips32r2.d,v
retrieving revision 1.1
diff -u -p -r1.1 mips32r2.d
--- gas/testsuite/gas/mips/mips32r2.d 31 Dec 2002 07:29:28 -0000 1.1
+++ gas/testsuite/gas/mips/mips32r2.d 2 Jan 2003 19:53:31 -0000
@@ -1,7 +1,7 @@
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: MIPS MIPS32r2 instructions
-# Check MIPS32 instruction assembly
+# Check MIPS32 Release 2 (mips32r2) instruction assembly
.*: +file format .*mips.*
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.32
diff -u -p -r1.32 mips.h
--- include/opcode/mips.h 31 Dec 2002 08:11:18 -0000 1.32
+++ include/opcode/mips.h 2 Jan 2003 19:53:33 -0000
@@ -1,5 +1,5 @@
/* mips.h. Mips opcode list for GDB, the GNU debugger.
- Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by Ralph Campbell and OSF
Commented and modified by Ian Lance Taylor, Cygnus Support
@@ -233,11 +233,14 @@ struct mips_opcode
"x" accept and ignore register name
"z" must be zero register
"K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
- "+A" 5 bit ins/ext position/lsb (OP_*_SHAMT)
- "+B" 5 bit "ins" size spec (OP_*_INSMSB). Requires that "+A"
- occur first!
- "+C" 5 bit "ext" msbd spec (OP_*_EXTMSBD). Requires that "+A"
- occur first!
+ "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT).
+ Enforces: 0 <= pos < 32.
+ "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB).
+ Requires that "+A" occur first to set position.
+ Enforces: 0 < (pos+size) <= 32.
+ "+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD).
+ Requires that "+A" occur first to set position.
+ Enforces: 0 < (pos+size) <= 32.
Floating point instructions:
"D" 5 bit destination register (OP_*_FD)