Re: MIPS assembler branch relaxations

[Thiemo Seufer <ica2_ts at csv dot ica dot uni-stuttgart dot de>]

Alexandre Oliva wrote:
> On Sep 14, 2002, Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de> wrote:
> 
> >> Why beqzl?  Admittedly, I don't know much about MIPS hardware, but I'd
> >> think that just "b" would probably be faster, since that's the normal
> >> unconditional branch.
> 
> > "b" isn't a valid opcode. :-)
> 
> Right.  `b foo' is just a shorthand for `beq $0, $0, foo'
> 
> > Btw, "beqzl" also isn't one.
> 
> Huh?  Please check your ISA manual again.  It surely is there.

Definitly not for MIPS IV and earlier.
Of course, "beql" is there, and with rt == $0 it equals "beqzl".
(/opcodes/mips-opc.c provides "beqzl" this way.)

It's a style issue, I like to use the official mnemnonic in such a case,
but probably that's only me.

> > In this special case I'd prefer "beq".
> 
> Then other branch prediction forms would kick in, and the branch would
> probably be considered unlikely for being a forward branch.  I don't
> know whether mips has any such considerations, but indicating the
> branch is likely if there is a way to do so is an obvious improvement
> to me.

Ok, then it would be "beql".


Thiemo